# Accelerating System-Level Debug Using Rule Learning and Subgroup Discovery Techniques

arXiv: https://arxiv.org/abs/2207.00622 · HTML: https://mlsanity.com/paper/2207.00622/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 2 of its 45 references that are in the map.
- First posted on arXiv 2 Jul 2022.

## Builds on (most cited first, 2 of 2)

- [Feature Engineering for Scalable Application-Level Post-Silicon Debugging](https://mlsanity.com/paper/2102.04554/) (2021)
- [Root cause prediction based on bug reports](https://mlsanity.com/paper/2103.02372/) (2021)

## Built on by (most cited first, 1 of 1)

- [SMLP: Symbolic Machine Learning Prover (User Manual)](https://mlsanity.com/paper/2405.10215/) (2024)

## Abstract (arXiv)

We propose a root-causing procedure for accelerating system-level debug using rule-based techniques. We describe the procedure and how it provides high quality debug hints for reducing the debug effort. This includes the heuristics for engineering features from logs of many tests, and the data analytics techniques for generating powerful debug hints. As a case study, we used these techniques for root-causing failures of the Power Management (PM) design feature Package-C8 and showed their effectiveness. Furthermore, we propose an approach for mining the root-causing experience and results for reuse, to accelerate future debug activities and reduce dependency on validation experts. We believe that these techniques are beneficial also for other validation activities at different levels of abstraction, for complex hardware, software and firmware systems, both pre-silicon and post-silicon.