# Machine Learning Training on a Real Processing-in-Memory System

arXiv: https://arxiv.org/abs/2206.06022 · HTML: https://mlsanity.com/paper/2206.06022/

## Key facts

- Cited by 4 papers in the map (data through 14 Oct 2026).
- Builds on 29 of its 179 references that are in the map.
- First posted on arXiv 13 Jun 2022.

## Builds on (most cited first, 29 of 29)

- [A Survey of Quantization Methods for Efficient Neural Network Inference](https://mlsanity.com/paper/2103.13630/) (2021)
- [In-Datacenter Performance Analysis of a Tensor Processing Unit](https://mlsanity.com/paper/1704.04760/) (2017)
- [cuDNN: Efficient Primitives for Deep Learning](https://mlsanity.com/paper/1410.0759/) (2014)
- [Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks](https://mlsanity.com/paper/1805.03718/) (2018)
- [A Modern Primer on Processing in Memory](https://mlsanity.com/paper/2012.03112/) (2020)
- [Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks](https://mlsanity.com/paper/2109.14320/) (2021)
- [Processing Data Where It Makes Sense: Enabling In-Memory Computation](https://mlsanity.com/paper/1903.03988/) (2019)
- [SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems](https://mlsanity.com/paper/2104.07582/) (2021)
- [Benchmarking Memory-Centric Computing Systems: Analysis of Real Processing-in-Memory Hardware](https://mlsanity.com/paper/2110.01709/) (2021)
- [GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies](https://mlsanity.com/paper/1711.01177/) (2017)
- [NATSA: A Near-Data Processing Accelerator for Time Series Analysis](https://mlsanity.com/paper/2010.02079/) (2020)
- [DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks](https://mlsanity.com/paper/2105.03725/) (2021)
- [SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures](https://mlsanity.com/paper/2101.07557/) (2021)
- [Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture](https://mlsanity.com/paper/2105.03814/) (2021)
- [NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling](https://mlsanity.com/paper/2009.08241/) (2020)
- [QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips](https://mlsanity.com/paper/2105.08955/) (2021)
- [FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications](https://mlsanity.com/paper/2106.06433/) (2021)
- [Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM](https://mlsanity.com/paper/1611.09988/) (2016)
- [D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput](https://mlsanity.com/paper/1808.04286/) (2018)
- [In-DRAM Bulk Bitwise Execution Engine](https://mlsanity.com/paper/1905.09822/) (2019)
- [NOM: Network-On-Memory for Inter-Bank Data Transfer in Highly-Banked Memories](https://mlsanity.com/paper/2004.09923/) (2020)
- [FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching](https://mlsanity.com/paper/2009.08437/) (2020)
- [Polynesia: Enabling Effective Hybrid Transactional/Analytical Databases with Specialized Hardware/Software Co-Design](https://mlsanity.com/paper/2103.00798/) (2021)
- [Casper: Accelerating Stencil Computation using Near-cache Processing](https://mlsanity.com/paper/2112.14216/) (2021)
- [GenStore: A High-Performance and Energy-Efficient In-Storage Computing System for Genome Sequence Analysis](https://mlsanity.com/paper/2202.10400/) (2022)
- [High-throughput Pairwise Alignment with the Wavefront Algorithm using Processing-in-Memory](https://mlsanity.com/paper/2204.02085/) (2022)
- [Accelerating Weather Prediction using Near-Memory Reconfigurable Fabric](https://mlsanity.com/paper/2107.08716/) (2021)
- [Combining Emulation and Simulation to Evaluate a Near Memory Key/Value Lookup Accelerator](https://mlsanity.com/paper/2105.06594/) (2021)
- [SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems](https://mlsanity.com/paper/2201.05072/) (2022)

## Built on by (most cited first, 4 of 4)

- [PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System](https://mlsanity.com/paper/2404.07164/) (2024)
- [SwiftRL: Towards Efficient Reinforcement Learning on Real Processing-In-Memory Systems](https://mlsanity.com/paper/2405.03967/) (2024)
- [Harmonia: Enhancing Data Placement and Migration in Hybrid Storage Systems via Multi-Agent Reinforcement Learning](https://mlsanity.com/paper/2503.20507/) (2025)
- [PATTON: Enabling Commodity PIM for Production LLM Serving](https://mlsanity.com/paper/2609.11392/) (2026)

## Abstract (arXiv)

Training machine learning algorithms is a computationally intensive process, which is frequently memory-bound due to repeatedly accessing large training datasets. As a result, processor-centric systems (e.g., CPU, GPU) suffer from costly data movement between memory units and processing units, which consumes large amounts of energy and execution cycles. Memory-centric computing systems, i.e., computing systems with processing-in-memory (PIM) capabilities, can alleviate this data movement bottleneck. Our goal is to understand the potential of modern general-purpose PIM architectures to accelerate machine learning training. To do so, we (1) implement several representative classic machine learning algorithms (namely, linear regression, logistic regression, decision tree, K-means clustering) on a real-world general-purpose PIM architecture, (2) characterize them in terms of accuracy, performance and scaling, and (3) compare to their counterpart implementations on CPU and GPU. Our experimental evaluation on a memory-centric computing system with more than 2500 PIM cores shows that general-purpose PIM architectures can greatly accelerate memory-bound machine learning workloads, when the necessary operations and datatypes are natively supported by PIM hardware. To our knowledge, our work is the first one to evaluate training of machine learning algorithms on a real-world general-purpose PIM architecture.