# Hardware Trojan Detection using Graph Neural Networks

arXiv: https://arxiv.org/abs/2204.11431 · HTML: https://mlsanity.com/paper/2204.11431/

## Key facts

- Cited by 8 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 25 Apr 2022.

## Built on by (most cited first, 8 of 8)

- [Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs](https://mlsanity.com/paper/2211.16495/) (2022)
- [Semantic Consensus Decoding: Backdoor Defense for Verilog Code Generation](https://mlsanity.com/paper/2602.04195/) (2026)
- [SafeTune: Mitigating Data Poisoning in LLM Fine-Tuning for RTL Code Generation](https://mlsanity.com/paper/2604.27238/) (2026)
- [TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs](https://mlsanity.com/paper/2506.17894/) (2025)
- [Explainability Methods for Hardware Trojan Detection: A Systematic Comparison](https://mlsanity.com/paper/2601.18696/) (2026)
- [Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL](https://mlsanity.com/paper/2603.09161/) (2026)
- [Learning Structural Manipulability in Gate-Level Netlists Using Graph Neural Networks](https://mlsanity.com/paper/2607.16245/) (2026)
- [ADVERSARIAL: And-Inverter Graph-Assisted Hardware Trojan Detection At Scale](https://mlsanity.com/paper/2607.23882/) (2026)

## Abstract (arXiv)

The globalization of the Integrated Circuit (IC) supply chain has moved most of the design, fabrication, and testing process from a single trusted entity to various untrusted third-party entities around the world. The risk of using untrusted third-Party Intellectual Property (3PIP) is the possibility for adversaries to insert malicious modifications known as Hardware Trojans (HTs). These HTs can compromise the integrity, deteriorate the performance, and deny the functionality of the intended design. Various HT detection methods have been proposed in the literature; however, many fall short due to their reliance on a golden reference circuit, a limited detection scope, the need for manual code review, or the inability to scale with large modern designs. We propose a novel golden reference-free HT detection method for both Register Transfer Level (RTL) and gate-level netlists by leveraging Graph Neural Networks (GNNs) to learn the behavior of the circuit through a Data Flow Graph (DFG) representation of the hardware design. We evaluate our model on a custom dataset by expanding the Trusthub HT benchmarks citetrusthub1. The results demonstrate that our approach detects unknown HTs with 97% recall (true positive rate) very fast in 21.1ms for RTL and 84% recall in 13.42s for Gate-Level Netlist.