# PISA: A Binary-Weight Processing-In-Sensor Accelerator for Edge Image Processing

arXiv: https://arxiv.org/abs/2202.09035 · HTML: https://mlsanity.com/paper/2202.09035/

## Key facts

- Cited by 4 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 18 Feb 2022.

## Built on by (most cited first, 4 of 4)

- [P2M: A Processing-in-Pixel-in-Memory Paradigm for Resource-Constrained TinyML Applications](https://mlsanity.com/paper/2203.04737/) (2022)
- [Ultra-Efficient On-Device Object Detection on AI-Integrated Smart Glasses with TinyissimoYOLO](https://mlsanity.com/paper/2311.01057/) (2023)
- [HyperSense: Hyperdimensional Intelligent Sensing for Energy-Efficient Sparse Data Processing](https://mlsanity.com/paper/2401.10267/) (2024)
- [Hyperdimensional Intelligent Sensing for Efficient Real-Time Audio Processing on Extreme Edge](https://mlsanity.com/paper/2502.10718/) (2025)

## Abstract (arXiv)

This work proposes a Processing-In-Sensor Accelerator, namely PISA, as a flexible, energy-efficient, and high-performance solution for real-time and smart image processing in AI devices. PISA intrinsically implements a coarse-grained convolution operation in Binarized-Weight Neural Networks (BWNNs) leveraging a novel compute-pixel with non-volatile weight storage at the sensor side. This remarkably reduces the power consumption of data conversion and transmission to an off-chip processor. The design is completed with a bit-wise near-sensor processing-in-DRAM computing unit to process the remaining network layers. Once the object is detected, PISA switches to typical sensing mode to capture the image for a fine-grained convolution using only the near-sensor processing unit. Our circuit-to-application co-simulation results on a BWNN acceleration demonstrate acceptable accuracy on various image datasets in coarse-grained evaluation compared to baseline BWNN models, while PISA achieves a frame rate of 1000 and efficiency of ~1.74 TOp/s/W. Lastly, PISA substantially reduces data conversion and transmission energy by ~84% compared to a baseline CPU-sensor design.