# Vau da muntanialas: Energy-efficient multi-die scalable acceleration of RNN inference

arXiv: https://arxiv.org/abs/2202.07462 · HTML: https://mlsanity.com/paper/2202.07462/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 31 of its 71 references that are in the map.
- First posted on arXiv 14 Feb 2022.

## Builds on (most cited first, 30 of 31)

- [Attention Is All You Need](https://mlsanity.com/paper/1706.03762/) (2017)
- [Deep Residual Learning for Image Recognition](https://mlsanity.com/paper/1512.03385/) (2015)
- [MobileNetV2: Inverted Residuals and Linear Bottlenecks](https://mlsanity.com/paper/1801.04381/) (2018)
- [An Empirical Evaluation of Generic Convolutional and Recurrent Networks for Sequence Modeling](https://mlsanity.com/paper/1803.01271/) (2018)
- [Speech Recognition with Deep Recurrent Neural Networks](https://mlsanity.com/paper/1303.5778/) (2013)
- [Deep Speech: Scaling up end-to-end speech recognition](https://mlsanity.com/paper/1412.5567/) (2014)
- [Data-Free Quantization Through Weight Equalization and Bias Correction](https://mlsanity.com/paper/1906.04721/) (2019)
- [LQ-Nets: Learned Quantization for Highly Accurate and Compact Deep Neural Networks](https://mlsanity.com/paper/1807.10029/) (2018)
- [Recent Trends in Deep Learning Based Natural Language Processing](https://mlsanity.com/paper/1708.02709/) (2017)
- [A Study of BFLOAT16 for Deep Learning Training](https://mlsanity.com/paper/1905.12322/) (2019)
- [Incremental Network Quantization: Towards Lossless CNNs with Low-Precision Weights](https://mlsanity.com/paper/1702.03044/) (2017)
- [Trained Ternary Quantization](https://mlsanity.com/paper/1612.01064/) (2016)
- [Recent Advances in Recurrent Neural Networks](https://mlsanity.com/paper/1801.01078/) (2017)
- [Extremely Low Bit Neural Network: Squeeze the Last Bit Out with ADMM](https://mlsanity.com/paper/1707.09870/) (2017)
- [ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA](https://mlsanity.com/paper/1612.00694/) (2016)
- [Alternating Multi-bit Quantization for Recurrent Neural Networks](https://mlsanity.com/paper/1802.00150/) (2018)
- [XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference](https://mlsanity.com/paper/1807.03010/) (2018)
- [C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs](https://mlsanity.com/paper/1803.06305/) (2018)
- [Effective Quantization Methods for Recurrent Neural Networks](https://mlsanity.com/paper/1611.10176/) (2016)
- [Effective Quantization Approaches for Recurrent Neural Networks](https://mlsanity.com/paper/1802.02615/) (2018)
- [CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration with Better-than-Binary Energy Efficiency](https://mlsanity.com/paper/2011.01713/) (2020)
- [Chipmunk: A Systolically Scalable 0.9 mm2, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference](https://mlsanity.com/paper/1711.05734/) (2017)
- [CBinfer: Exploiting Frame-to-Frame Locality for Faster Convolutional Network Inference on Video Streams](https://mlsanity.com/paper/1808.05488/) (2018)
- [Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing](https://mlsanity.com/paper/2008.06502/) (2020)
- [EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators](https://mlsanity.com/paper/1908.11645/) (2019)
- [Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node](https://mlsanity.com/paper/2007.08952/) (2020)
- [Learning to Skip Ineffectual Recurrent Computations in LSTMs](https://mlsanity.com/paper/1811.10396/) (2018)
- [RPR: Random Partition Relaxation for Training; Binary and Ternary Weight Neural Networks](https://mlsanity.com/paper/2001.01091/) (2020)
- [AIDA: Associative DNN Inference Accelerator](https://mlsanity.com/paper/1901.04976/) (2018)
- [ELSA: A Throughput-Optimized Design of an LSTM Accelerator for Energy-Constrained Devices](https://mlsanity.com/paper/1910.08683/) (2019)

## Built on by (most cited first, 2 of 2)

- [MINIMALIST: switched-capacitor circuits for efficient in-memory computation of gated recurrent units](https://mlsanity.com/paper/2505.08599/) (2025)
- [Coflex: Enhancing HW-NAS with Sparse Gaussian Processes for Efficient and Scalable DNN Accelerator Design](https://mlsanity.com/paper/2507.23437/) (2025)

## Abstract (arXiv)

Recurrent neural networks such as Long Short-Term Memories (LSTMs) learn temporal dependencies by keeping an internal state, making them ideal for time-series problems such as speech recognition. However, the output-to-input feedback creates distinctive memory bandwidth and scalability challenges in designing accelerators for RNNs. We present Muntaniala, an RNN accelerator architecture for LSTM inference with a silicon-measured energy-efficiency of 3.25TOP/s/W and performance of 30.53GOP/s in UMC 65 nm technology. The scalable design of Muntaniala allows running large RNN models by combining multiple tiles in a systolic array. We keep all parameters stationary on every die in the array, drastically reducing the I/O communication to only loading new features and sharing partial results with other dies. For quantifying the overall system power, including I/O power, we built Vau da Muntanialas, to the best of our knowledge, the first demonstration of a systolic multi-chip-on-PCB array of RNN accelerator. Our multi-die prototype performs LSTM inference with 192 hidden states in 330μ s with a total system power of 9.0mW at 10MHz consuming 2.95μ J. Targeting the 8/16-bit quantization implemented in Muntaniala, we show a phoneme error rate (PER) drop of approximately 3% with respect to floating-point (FP) on a 3L-384NH-123NI LSTM network on the TIMIT dataset.