# Comparing different solutions for testing resistive defects in low-power SRAMs

arXiv: https://arxiv.org/abs/2112.15176 · HTML: https://mlsanity.com/paper/2112.15176/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 30 Dec 2021.

## Built on by (most cited first, 1 of 1)

- [Testing Spintronics Implemented Monte Carlo Dropout-Based Bayesian Neural Networks](https://mlsanity.com/paper/2401.04744/) (2024)

## Abstract (arXiv)

Low-power SRAM architectures are especially sensitive to many types of defects that may occur during manufacturing. Among these, resistive defects can appear. This paper analyzes some types of such defects that may impair the device functionalities in subtle ways, depending on the defect characteristics, and that may not be directly or easily detectable by traditional test methods, such as March algorithms. We analyze different methods to test such defects and discuss them in terms of complexity and test time.