# A Methodology for Thermal Simulation of Interconnects Enabled by Model Reduction with Material Property Variation

arXiv: https://arxiv.org/abs/2112.03023 · HTML: https://mlsanity.com/paper/2112.03023/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 0 of its 54 references that are in the map.
- First posted on arXiv 1 Dec 2021.

## Built on by (most cited first, 2 of 2)

- [Physics-informed Reduced-Order Learning from the First Principles for Simulation of Quantum Nanostructures](https://mlsanity.com/paper/2302.00100/) (2023)
- [TherMapNet Attention-Guided Runtime Full-Chip Thermal Map Prediction from Performance Metrics](https://mlsanity.com/paper/2608.21887/) (2026)

## Abstract (arXiv)

A thermal simulation methodology is developed for interconnects enabled by a data-driven learning algorithm accounting for variations of material properties, heat sources and boundary conditions (BCs). The methodology is based on the concepts of model order reduction and domain decomposition to construct a multi-block approach. A generic block model is built to represent a group of interconnect blocks that are used to wire standard cells in the integrated circuits (ICs). The blocks in this group possess identical geometry with various metal/via routings. The data-driven model reduction method is thus applied to learn material property variations induced by different metal/via routings in the blocks, in addition to the variations of heat sources and BCs. The approach is investigated in two very different settings. It is first applied to thermal simulation of a single interconnect block with similar BCs to those in the training of the generic block. It is then implemented in multi-block thermal simulation of a FinFET IC, where the interconnect structure is partitioned into several blocks each modeled by the generic block model. Accuracy of the generic block model is examined in terms of the metal/via routings, BCs and thermal discontinuities at the block interfaces.