# An Embedded Iris Recognition System Optimization using Dynamically ReconfigurableDecoder with LDPC Codes

arXiv: https://arxiv.org/abs/2107.03688 · HTML: https://mlsanity.com/paper/2107.03688/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 1 of its 43 references that are in the map.
- First posted on arXiv 8 Jul 2021.

## Builds on (most cited first, 1 of 1)

- [A 2.0 Gb/s Throughput Decoder for QC-LDPC Convolutional Codes](https://mlsanity.com/paper/1305.0185/) (2013)

## Abstract (arXiv)

Extracting and analyzing iris textures for biometric recognition has been extensively studied. As the transition of iris recognition from lab technology to nation-scale applications, most systems are facing high complexity in either time or space, leading to unfitness for embedded devices. In this paper, the proposed design includes a minimal set of computer vision modules and multi-mode QC-LDPC decoder which can alleviate variability and noise caused by iris acquisition and follow-up process. Several classes of QC-LDPC code from IEEE 802.16 are tested for the validity of accuracy improvement. Some of the codes mentioned above are used for further QC-LDPC decoder quantization, validation and comparison to each other. We show that we can apply Dynamic Partial Reconfiguration technology to implement the multi-mode QC-LDPC decoder for the iris recognition system. The results show that the implementation is power-efficient and good for edge applications.