# MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing

arXiv: https://arxiv.org/abs/2106.12029 · HTML: https://mlsanity.com/paper/2106.12029/

## Key facts

- Cited by 7 papers in the map (data through 14 Oct 2026).
- Builds on 4 of its 33 references that are in the map.
- First posted on arXiv 22 Jun 2021.

## Builds on (most cited first, 4 of 4)

- [TensorFlow: Large-Scale Machine Learning on Heterogeneous Distributed Systems](https://mlsanity.com/paper/1603.04467/) (2016)
- [In-memory hyperdimensional computing](https://mlsanity.com/paper/1906.01548/) (2019)
- [SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning](https://mlsanity.com/paper/2007.15222/) (2020)
- [In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories](https://mlsanity.com/paper/2011.07095/) (2020)

## Built on by (most cited first, 7 of 7)

- [A Survey on Hyperdimensional Computing aka Vector Symbolic Architectures, Part II: Applications, Cognitive Models, and Challenges](https://mlsanity.com/paper/2112.15424/) (2021)
- [Learning from Hypervectors: A Survey on Hypervector Encoding](https://mlsanity.com/paper/2308.00685/) (2023)
- [An Encoding Framework for Binarized Images using HyperDimensional Computing](https://mlsanity.com/paper/2312.00454/) (2023)
- [Streaming Encoding Algorithms for Scalable Hyperdimensional Computing](https://mlsanity.com/paper/2209.09868/) (2022)
- [Towards Efficient Hyperdimensional Computing Using Photonics](https://mlsanity.com/paper/2311.17801/) (2023)
- [FLARE: FP-Less PTQ and Low-ENOB ADC Based AMS-PiM for Error-Resilient, Fast, and Efficient Transformer Acceleration](https://mlsanity.com/paper/2411.14733/) (2024)
- [Robust Reasoning and Learning with Brain-Inspired Representations under Hardware-Induced Nonlinearities](https://mlsanity.com/paper/2604.12079/) (2026)

## Abstract (arXiv)

Hyperdimensional Computing (HDC) is an emerging computational framework that mimics important brain functions by operating over high-dimensional vectors, called hypervectors (HVs). In-memory computing implementations of HDC are desirable since they can significantly reduce data transfer overheads. All existing in-memory HDC platforms consider binary HVs where each dimension is represented with a single bit. However, utilizing multi-bit HVs allows HDC to achieve acceptable accuracies in lower dimensions which in turn leads to higher energy efficiencies. Thus, we propose a highly accurate and efficient multi-bit in-memory HDC inference platform called MIMHD. MIMHD supports multi-bit operations using ferroelectric field-effect transistor (FeFET) crossbar arrays for multiply-and-add and FeFET multi-bit content-addressable memories for associative search. We also introduce a novel hardware-aware retraining framework (HWART) that trains the HDC model to learn to work with MIMHD. For six popular datasets and 4000 dimension HVs, MIMHD using 3-bit (2-bit) precision HVs achieves (i) average accuracies of 92.6% (88.9%) which is 8.5% (4.8%) higher than binary implementations; (ii) 84.1x (78.6x) energy improvement over a GPU, and (iii) 38.4x (34.3x) speedup over a GPU, respectively. The 3-bit × is 4.3x and 13x faster and more energy-efficient than binary HDC accelerators while achieving similar accuracies.