# Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs

arXiv: https://arxiv.org/abs/2103.04808 · HTML: https://mlsanity.com/paper/2103.04808/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 8 Mar 2021.

## Built on by (most cited first, 1 of 1)

- [Ember: A Compiler for Efficient Embedding Operations on Decoupled Access-Execute Architectures](https://mlsanity.com/paper/2504.09870/) (2025)

## Abstract (arXiv)

Top-K SpMV is a key component of similarity-search on sparse embeddings. This sparse workload does not perform well on general-purpose NUMA systems that employ traditional caching strategies. Instead, modern FPGA accelerator cards have a few tricks up their sleeve. We introduce a Top-K SpMV FPGA design that leverages reduced precision and a novel packet-wise CSR matrix compression, enabling custom data layouts and delivering bandwidth efficiency often unreachable even in architectures with higher peak bandwidth. With HBM-based boards, we are 100x faster than a multi-threaded CPU implementation and 2x faster than a GPU with 20% higher bandwidth, with 14.2x higher power-efficiency.