# Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks

arXiv: https://arxiv.org/abs/2009.09009 · HTML: https://mlsanity.com/paper/2009.09009/

## Key facts

- Cited by 13 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 18 Sep 2020.

## Built on by (most cited first, 13 of 13)

- [A Thermal Machine Learning Solver For Chip Simulation](https://mlsanity.com/paper/2209.04741/) (2022)
- [PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction](https://mlsanity.com/paper/2403.18569/) (2024)
- [RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis](https://mlsanity.com/paper/2312.16895/) (2023)
- [OpeNPDN: A Neural-network-based Framework for Power Delivery Network Synthesis](https://mlsanity.com/paper/2110.14184/) (2021)
- [CFIRSTNET: Comprehensive Features for Static IR Drop Estimation with Neural Network](https://mlsanity.com/paper/2502.12168/) (2025)
- [Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks](https://mlsanity.com/paper/2110.14197/) (2021)
- [Worst-Case Dynamic Power Distribution Network Noise Prediction Using Convolutional Neural Network](https://mlsanity.com/paper/2204.13109/) (2022)
- [Static IR Drop Prediction with Attention U-Net and Saliency-Based Explainability](https://mlsanity.com/paper/2408.03292/) (2024)
- [A Novel Frequency-Spatial Domain Aware Network for Fast Thermal Prediction in 2.5D ICs](https://mlsanity.com/paper/2504.14237/) (2025)
- [DALI-PD: Diffusion-based Synthetic Layout Heatmap Generation for ML in Physical Design](https://mlsanity.com/paper/2507.10606/) (2025)
- [WACA-UNet: Weakness-Aware Channel Attention for Static IR Drop Prediction in Integrated Circuit Design](https://mlsanity.com/paper/2507.19197/) (2025)
- [LMM-IR: Large-Scale Netlist-Aware Multimodal Framework for Static IR-Drop Prediction](https://mlsanity.com/paper/2511.12581/) (2025)
- [PhysEDA: Physics-Aware Learning Framework for Efficient EDA With Manhattan Distance Decay](https://mlsanity.com/paper/2605.10547/) (2026)

## Abstract (arXiv)

Computationally expensive temperature and power grid analyses are required during the design cycle to guide IC design. This paper employs encoder-decoder based generative (EDGe) networks to map these analyses to fast and accurate image-to-image and sequence-to-sequence translation tasks. The network takes a power map as input and outputs the corresponding temperature or IR drop map. We propose two networks: (i) ThermEDGe: a static and dynamic full-chip temperature estimator and (ii) IREDGe: a full-chip static IR drop predictor based on input power, power grid distribution, and power pad distribution patterns. The models are design-independent and must be trained just once for a particular technology and packaging solution. ThermEDGe and IREDGe are demonstrated to rapidly predict the on-chip temperature and IR drop contours in milliseconds (in contrast with commercial tools that require several hours or more) and provide an average error of 0.6% and 0.008% respectively.