# Accelerated Analog Neuromorphic Computing

arXiv: https://arxiv.org/abs/2003.11996 · HTML: https://mlsanity.com/paper/2003.11996/

## Key facts

- Cited by 9 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 26 Mar 2020.

## Built on by (most cited first, 9 of 9)

- [Bottom-up and top-down approaches for the design of neuromorphic processing systems: Tradeoffs and synergies between natural and artificial intelligence](https://mlsanity.com/paper/2106.01288/) (2021)
- [Simple and complex spiking neurons: perspectives and analysis in a simple STDP scenario](https://mlsanity.com/paper/2207.04881/) (2022)
- [Variance-Aware Noisy Training: Hardening DNNs against Unstable Analog Computations](https://mlsanity.com/paper/2503.16183/) (2025)
- [Demonstrating Analog Inference on the BrainScaleS-2 Mobile System](https://mlsanity.com/paper/2103.15960/) (2021)
- [Frameworks for SNNs: a Review of Data Science-oriented Software and an Expansion of SpykeTorch](https://mlsanity.com/paper/2302.07624/) (2023)
- [On the Non-Associativity of Analog Computations](https://mlsanity.com/paper/2309.14292/) (2023)
- [Sparsity-Aware Hardware-Software Co-Design of Spiking Neural Networks: An Overview](https://mlsanity.com/paper/2408.14437/) (2024)
- [ANTShapes Benchmarking Datasets for Event-Based Neuromorphic Object Classification](https://mlsanity.com/paper/2608.27150/) (2026)
- [Beyond Noise: Understanding and Overcoming Temperature Effects in Analog DNN Inference](https://mlsanity.com/paper/2609.15527/) (2026)

## Abstract (arXiv)

This paper presents the concepts behind the BrainScales (BSS) accelerated analog neuromorphic computing architecture. It describes the second-generation BrainScales-2 (BSS-2) version and its most recent in-silico realization, the HICANN-X Application Specific Integrated Circuit (ASIC), as it has been developed as part of the neuromorphic computing activities within the European Human Brain Project (HBP). While the first generation is implemented in an 180nm process, the second generation uses 65nm technology. This allows the integration of a digital plasticity processing unit, a highly-parallel micro processor specially built for the computational needs of learning in an accelerated analog neuromorphic systems. The presented architecture is based upon a continuous-time, analog, physical model implementation of neurons and synapses, resembling an analog neuromorphic accelerator attached to build-in digital compute cores. While the analog part emulates the spike-based dynamics of the neural network in continuous-time, the latter simulates biological processes happening on a slower time-scale, like structural and parameter changes. Compared to biological time-scales, the emulation is highly accelerated, i.e. all time-constants are several orders of magnitude smaller than in biology. Programmable ion channel emulation and inter-compartmental conductances allow the modeling of nonlinear dendrites, back-propagating action-potentials as well as NMDA and Calcium plateau potentials. To extend the usability of the analog accelerator, it also supports vector-matrix multiplication. Thereby, BSS-2 supports inference of deep convolutional networks as well as local-learning with complex ensembles of spiking neurons within the same substrate.