# A Parallel Bitstream Generator for Stochastic Computing

arXiv: https://arxiv.org/abs/1904.09554 · HTML: https://mlsanity.com/paper/1904.09554/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 21 Apr 2019.

## Built on by (most cited first, 2 of 2)

- [OISMA: On-the-fly In-memory Stochastic Multiplication Architecture for Matrix-Multiplication Workloads](https://mlsanity.com/paper/2508.08822/) (2025)
- [DISCA: A Digital In-memory Stochastic Computing Architecture Using A Compressed Bent-Pyramid Format](https://mlsanity.com/paper/2511.17265/) (2025)

## Abstract (arXiv)

Stochastic computing (SC) presents high error tolerance and low hardware cost, and has great potential in applications such as neural networks and image processing. However, the bitstream generator, which converts a binary number to bitstreams, occupies a large area and energy consumption, thus weakening the superiority of SC. In this paper, we propose a novel technique for generating bitstreams in parallel, which needs only one clock for conversion and significantly reduces the hardware cost. Synthesis results demonstrate that the proposed parallel bitstream generator improves 2.5x area and 712x energy consumption.