# A Simple Method to Reduce Off-chip Memory Accesses on Convolutional Neural Networks

arXiv: https://arxiv.org/abs/1901.09614 · HTML: https://mlsanity.com/paper/1901.09614/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 28 Jan 2019.

## Built on by (most cited first, 1 of 1)

- [Tensor Slicing and Optimization for Multicore NPUs](https://mlsanity.com/paper/2304.03013/) (2023)

## Abstract (arXiv)

For convolutional neural networks, a simple algorithm to reduce off-chip memory accesses is proposed by maximally utilizing on-chip memory in a neural process unit. Especially, the algorithm provides an effective way to process a module which consists of multiple branches and a merge layer. For Inception-V3 on Samsung's NPU in Exynos, our evaluation shows that the proposed algorithm makes off-chip memory accesses reduced by 1/50, and accordingly achieves 97.59 % reduction in the amount of feature-map data to be transferred from/to off-chip memory.