# Learning in Memristive Neural Network Architectures using Analog Backpropagation Circuits

arXiv: https://arxiv.org/abs/1808.10631 · HTML: https://mlsanity.com/paper/1808.10631/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 31 Aug 2018.

## Built on by (most cited first, 2 of 2)

- [Analog Gated Recurrent Neural Network for Detecting Chewing Events](https://mlsanity.com/paper/2208.01201/) (2022)
- [Efficient Calibration for RRAM-based In-Memory Computing using DoRA](https://mlsanity.com/paper/2504.03763/) (2025)

## Abstract (arXiv)

The on-chip implementation of learning algorithms would speed-up the training of neural networks in crossbar arrays. The circuit level design and implementation of backpropagation algorithm using gradient descent operation for neural network architectures is an open problem. In this paper, we proposed the analog backpropagation learning circuits for various memristive learning architectures, such as Deep Neural Network (DNN), Binary Neural Network (BNN), Multiple Neural Network (MNN), Hierarchical Temporal Memory (HTM) and Long-Short Term Memory (LSTM). The circuit design and verification is done using TSMC 180nm CMOS process models, and TiO2 based memristor models. The application level validations of the system are done using XOR problem, MNIST character and Yale face image databases