# BLASYS: Approximate Logic Synthesis Using Boolean Matrix Factorization

arXiv: https://arxiv.org/abs/1805.06050 · HTML: https://mlsanity.com/paper/1805.06050/

## Key facts

- Cited by 4 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 15 May 2018.

## Built on by (most cited first, 4 of 4)

- [Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications](https://mlsanity.com/paper/2307.11128/) (2023)
- [OPTDTALS: Approximate Logic Synthesis via Optimal Decision Trees Approach](https://mlsanity.com/paper/2408.12304/) (2024)
- [An Improved Template for Approximate Computing](https://mlsanity.com/paper/2509.06162/) (2025)
- [TRAM: Training Approximate Multiplier Structures for Low-Power AI Accelerators](https://mlsanity.com/paper/2605.08231/) (2026)

## Abstract (arXiv)

Approximate computing is an emerging paradigm where design accuracy can be traded off for benefits in design metrics such as design area, power consumption or circuit complexity. In this work, we present a novel paradigm to synthesize approximate circuits using Boolean matrix factorization (BMF). In our methodology the truth table of a sub-circuit of the design is approximated using BMF to a controllable approximation degree, and the results of the factorization are used to synthesize a less complex subcircuit. To scale our technique to large circuits, we devise a circuit decomposition method and a subcircuit design-space exploration technique to identify the best order for subcircuit approximations. Our method leads to a smooth trade-off between accuracy and full circuit complexity as measured by design area and power consumption. Using an industrial strength design flow, we extensively evaluate our methodology on a number of testcases, where we demonstrate that the proposed methodology can achieve up to 63% in power savings, while introducing an average relative error of 5%. We also compare our work to previous works in Boolean circuit synthesis and demonstrate significant improvements in design metrics for same accuracy targets.