# PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

arXiv: https://arxiv.org/abs/1804.09123 · HTML: https://mlsanity.com/paper/1804.09123/

## Key facts

- Cited by 11 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 24 Apr 2018.

## Built on by (most cited first, 11 of 11)

- [A Survey on Hyperdimensional Computing aka Vector Symbolic Architectures, Part II: Applications, Cognitive Models, and Challenges](https://mlsanity.com/paper/2112.15424/) (2021)
- [Vector Symbolic Architectures as a Computing Framework for Emerging Hardware](https://mlsanity.com/paper/2106.05268/) (2021)
- [Generalized Learning Vector Quantization for Classification in Randomized Neural Networks and Hyperdimensional Computing](https://mlsanity.com/paper/2106.09821/) (2021)
- [Learning from Hypervectors: A Survey on Hypervector Encoding](https://mlsanity.com/paper/2308.00685/) (2023)
- [A 5 μ W Standard Cell Memory-based Configurable Hyperdimensional Computing Accelerator for Always-on Smart Sensing](https://mlsanity.com/paper/2102.02758/) (2021)
- [Spiking Hyperdimensional Network: Neuromorphic Models Integrated with Memory-Inspired Framework](https://mlsanity.com/paper/2110.00214/) (2021)
- [HDReason: Algorithm-Hardware Codesign for Hyperdimensional Knowledge Graph Reasoning](https://mlsanity.com/paper/2403.05763/) (2024)
- [Brain-inspired Cognition in Next Generation Racetrack Memories](https://mlsanity.com/paper/2111.02246/) (2021)
- [uHD: Unary Processing for Lightweight and Dynamic Hyperdimensional Computing](https://mlsanity.com/paper/2311.10778/) (2023)
- [Brain-Inspired Hyperdimensional Computing: How Thermal-Friendly for Edge Computing?](https://mlsanity.com/paper/2204.03739/) (2022)
- [Robust Clustering using Hyperdimensional Computing](https://mlsanity.com/paper/2312.02407/) (2023)

## Abstract (arXiv)

Computing with high-dimensional (HD) vectors, also referred to as textithypervectors, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patterns-binary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5mm2, 2mW), surpassing the state-of-the-art classification accuracy (on average 92.4%) with simultaneous 3.7× end-to-end speed-up and 2× energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bit-manipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4× compared to the single-core PULPv3.