# Developing Synthesis Flows Without Human Knowledge

arXiv: https://arxiv.org/abs/1804.05714 · HTML: https://mlsanity.com/paper/1804.05714/

## Key facts

- Cited by 29 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 16 Apr 2018.

## Built on by (most cited first, 29 of 29)

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- [A Survey of Machine Learning for Computer Architecture and Systems](https://mlsanity.com/paper/2102.07952/) (2021)
- [OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis](https://mlsanity.com/paper/2110.11292/) (2021)
- [BOiLS: Bayesian Optimisation for Logic Synthesis](https://mlsanity.com/paper/2111.06178/) (2021)
- [Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization](https://mlsanity.com/paper/2401.12205/) (2024)
- [LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models](https://mlsanity.com/paper/2201.08455/) (2022)
- [RESPECT: Reinforcement Learning based Edge Scheduling on Pipelined Coral Edge TPUs](https://mlsanity.com/paper/2304.04716/) (2023)
- [Differentiable Combinatorial Scheduling at Scale](https://mlsanity.com/paper/2406.06593/) (2024)
- [Autonomous Evolution of EDA Tools: Multi-Agent Self-Evolved ABC](https://mlsanity.com/paper/2604.15082/) (2026)
- [Verilog-to-PyG -- A Framework for Graph Learning and Augmentation on RTL Designs](https://mlsanity.com/paper/2311.05722/) (2023)
- [Circuit Transformer: A Transformer That Preserves Logical Equivalence](https://mlsanity.com/paper/2403.13838/) (2024)
- [AISYN: AI-driven Reinforcement Learning-Based Logic Synthesis Framework](https://mlsanity.com/paper/2302.06415/) (2023)
- [Accelerating Exact Combinatorial Optimization via RL-based Initialization -- A Case Study in Scheduling](https://mlsanity.com/paper/2308.11652/) (2023)
- [MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning](https://mlsanity.com/paper/2407.18110/) (2024)
- [INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search](https://mlsanity.com/paper/2305.13164/) (2023)
- [Rethinking Reinforcement Learning based Logic Synthesis](https://mlsanity.com/paper/2205.07614/) (2022)
- [BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation](https://mlsanity.com/paper/2401.10753/) (2024)
- [ShortCircuit: AlphaZero-Driven Circuit Design](https://mlsanity.com/paper/2408.09858/) (2024)
- [Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis](https://mlsanity.com/paper/2204.02368/) (2022)
- [A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation](https://mlsanity.com/paper/2204.09579/) (2022)
- [The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks](https://mlsanity.com/paper/2207.11437/) (2022)
- [Towards the Imagenets of ML4EDA](https://mlsanity.com/paper/2310.10560/) (2023)
- [A Benchmark on Directed Graph Representation Learning in Hardware Designs](https://mlsanity.com/paper/2410.06460/) (2024)
- [Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematics](https://mlsanity.com/paper/2506.10577/) (2025)
- [The Dark Side: Security Concerns in Machine Learning for EDA](https://mlsanity.com/paper/2203.10597/) (2022)
- [On Robustness and Generalization of ML-Based Congestion Predictors to Valid and Imperceptible Perturbations](https://mlsanity.com/paper/2403.00103/) (2024)
- [ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring](https://mlsanity.com/paper/2508.08073/) (2025)
- [SynAct: A Reasoning-Acting Large Language Model Agent for Adaptive Synthesis Optimization](https://mlsanity.com/paper/2608.12751/) (2026)

## Abstract (arXiv)

Design flows are the explicit combinations of design transformations, primarily involved in synthesis, placement and routing processes, to accomplish the design of Integrated Circuits (ICs) and System-on-Chip (SoC). Mostly, the flows are developed based on the knowledge of the experts. However, due to the large search space of design flows and the increasing design complexity, developing Intellectual Property (IP)-specific synthesis flows providing high Quality of Result (QoR) is extremely challenging. This work presents a fully autonomous framework that artificially produces design-specific synthesis flows without human guidance and baseline flows, using Convolutional Neural Network (CNN). The demonstrations are made by successfully designing logic synthesis flows of three large scaled designs.