# Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions

arXiv: https://arxiv.org/abs/1803.05900 · HTML: https://mlsanity.com/paper/1803.05900/

## Key facts

- Cited by 27 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 15 Mar 2018.

## Built on by (most cited first, 27 of 27)

- [Pruning and Quantization for Deep Neural Network Acceleration: A Survey](https://mlsanity.com/paper/2101.09671/) (2021)
- [hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices](https://mlsanity.com/paper/2103.05579/) (2021)
- [Semantics for Robotic Mapping, Perception and Interaction: A Survey](https://mlsanity.com/paper/2101.00443/) (2021)
- [Fast convolutional neural networks on FPGAs with hls4ml](https://mlsanity.com/paper/2101.05108/) (2021)
- [Ultrafast jet classification on FPGAs for the HL-LHC](https://mlsanity.com/paper/2402.01876/) (2024)
- [CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs](https://mlsanity.com/paper/2201.01863/) (2022)
- [DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators](https://mlsanity.com/paper/2303.08226/) (2023)
- [Deep Neural Network-based Enhancement for Image and Video Streaming Systems: A Survey and Future Directions](https://mlsanity.com/paper/2106.03727/) (2021)
- [Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark](https://mlsanity.com/paper/2206.11791/) (2022)
- [Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators](https://mlsanity.com/paper/2401.09509/) (2024)
- [Exploring Fault-Energy Trade-offs in Approximate DNN Hardware Accelerators](https://mlsanity.com/paper/2101.02860/) (2021)
- [Learning on Hardware: A Tutorial on Neural Network Accelerators and Co-Processors](https://mlsanity.com/paper/2104.09252/) (2021)
- [HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices](https://mlsanity.com/paper/2303.17218/) (2023)
- [unzipFPGA: Enhancing FPGA-based CNN Engines with On-the-Fly Weights Generation](https://mlsanity.com/paper/2103.05600/) (2021)
- [ATHEENA: A Toolflow for Hardware Early-Exit Network Automation](https://mlsanity.com/paper/2304.08400/) (2023)
- [An FPGA smart camera implementation of segmentation models for drone wildfire imagery](https://mlsanity.com/paper/2309.01318/) (2023)
- [How to Reach Real-Time AI on Consumer Devices? Solutions for Programmable and Custom Architectures](https://mlsanity.com/paper/2106.15021/) (2021)
- [Compiler Toolchains for Deep Learning Workloads on Embedded Platforms](https://mlsanity.com/paper/2104.04576/) (2021)
- [Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays](https://mlsanity.com/paper/2204.09515/) (2022)
- [Mitigating Memory Wall Effects in CNN Engines with On-the-Fly Weights Generation](https://mlsanity.com/paper/2307.13412/) (2023)
- [Efficient Edge AI: Deploying Convolutional Neural Networks on FPGA with the Gemmini Accelerator](https://mlsanity.com/paper/2408.07404/) (2024)
- [A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs](https://mlsanity.com/paper/2203.04015/) (2022)
- [Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition](https://mlsanity.com/paper/2306.05021/) (2023)
- [A Parameterizable Convolution Accelerator for Embedded Deep Learning Applications](https://mlsanity.com/paper/2602.04044/) (2026)
- [Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review](https://mlsanity.com/paper/2603.08740/) (2026)
- [A reconfigurable smart camera implementation for jet flames characterization based on an optimized segmentation model](https://mlsanity.com/paper/2604.03267/) (2026)
- [Recent Developments in Transformer Inference Deployment on FPGA Platforms: A Survey](https://mlsanity.com/paper/2609.01212/) (2026)

## Abstract (arXiv)

In the past decade, Convolutional Neural Networks (CNNs) have demonstrated state-of-the-art performance in various Artificial Intelligence tasks. To accelerate the experimentation and development of CNNs, several software frameworks have been released, primarily targeting power-hungry CPUs and GPUs. In this context, reconfigurable hardware in the form of FPGAs constitutes a potential alternative platform that can be integrated in the existing deep learning ecosystem to provide a tunable balance between performance, power consumption and programmability. In this paper, a survey of the existing CNN-to-FPGA toolflows is presented, comprising a comparative study of their key characteristics which include the supported applications, architectural choices, design space exploration methods and achieved performance. Moreover, major challenges and objectives introduced by the latest trends in CNN algorithmic research are identified and presented. Finally, a uniform evaluation methodology is proposed, aiming at the comprehensive, complete and in-depth evaluation of CNN-to-FPGA toolflows.