# Interleaver Design for Deep Neural Networks

arXiv: https://arxiv.org/abs/1711.06935 · HTML: https://mlsanity.com/paper/1711.06935/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 18 Nov 2017.

## Built on by (most cited first, 1 of 1)

- [Artificial Neural Networks generated by Low Discrepancy Sequences](https://mlsanity.com/paper/2103.03543/) (2021)

## Abstract (arXiv)

We propose a class of interleavers for a novel deep neural network (DNN) architecture that uses algorithmically pre-determined, structured sparsity to significantly lower memory and computational requirements, and speed up training. The interleavers guarantee clash-free memory accesses to eliminate idle operational cycles, optimize spread and dispersion to improve network performance, and are designed to ease the complexity of memory address computations in hardware. We present a design algorithm with mathematical proofs for these properties. We also explore interleaver variations and analyze the behavior of neural networks as a function of interleaver metrics.