# Sparse Iterative Learning Control with Application to a Wafer Stage: Achieving Performance, Resource Efficiency, and Task Flexibility

arXiv: https://arxiv.org/abs/1706.01647 · HTML: https://mlsanity.com/paper/1706.01647/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 6 Jun 2017.

## Built on by (most cited first, 1 of 1)

- [Machine learning based iterative learning control for non-repetitive time-varying systems](https://mlsanity.com/paper/2107.00421/) (2021)

## Abstract (arXiv)

Trial-varying disturbances are a key concern in Iterative Learning Control (ILC) and may lead to inefficient and expensive implementations and severe performance deterioration. The aim of this paper is to develop a general framework for optimization-based ILC that allows for enforcing additional structure, including sparsity. The proposed method enforces sparsity in a generalized setting through convex relaxations using ℓ1 norms. The proposed ILC framework is applied to the optimization of sampling sequences for resource efficient implementation, trial-varying disturbance attenuation, and basis function selection. The framework has a large potential in control applications such as mechatronics, as is confirmed through an application on a wafer stage.