# A temporal logic approach to modular design of synthetic biological circuits

arXiv: https://arxiv.org/abs/1306.4493 · HTML: https://mlsanity.com/paper/1306.4493/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 19 Jun 2013.

## Built on by (most cited first, 1 of 1)

- [Learning-enabled Parameter Synthesis for Nonlinear Systems from Signal Temporal Logic](https://mlsanity.com/paper/2607.08899/) (2026)

## Abstract (arXiv)

We present a new approach for the design of a synthetic biological circuit whose behaviour is specified in terms of signal temporal logic (STL) formulae. We first show how to characterise with STL formulae the input/output behaviour of biological modules miming the classical logical gates (AND, NOT, OR). Hence, we provide the regions of the parameter space for which these specifications are satisfied. Given a STL specification of the target circuit to be designed and the networks of its constituent components, we propose a methodology to constrain the behaviour of each module, then identifying the subset of the parameter space in which those constraints are satisfied, providing also a measure of the robustness for the target circuit design. This approach, which leverages recent results on the quantitative semantics of Signal Temporal Logic, is illustrated by synthesising a biological implementation of an half-adder.