{"total":35,"rows":[{"id":"2501.15638","title":"A Comprehensive Survey on Self-Interpretable Neural Networks","created":"2025-01-26","cited_by_count":18,"area":null},{"id":"2506.04912","title":"Differentiable Logic Cellular Automata: From Game of Life to Pattern Generation","created":"2025-06-05","cited_by_count":9,"area":null},{"id":"2510.03250","title":"Light Differentiable Logic Gate Networks","created":"2025-09-26","cited_by_count":9,"area":null},{"id":"2510.15655","title":"WARP-LUTs -- Walsh-Assisted Relaxation for Probabilistic Look Up Tables","created":"2025-10-17","cited_by_count":6,"area":null},{"id":"2511.12340","title":"LILogic Net: Compact Logic Gate Networks with Learnable Connectivity for Efficient Hardware Deployment","created":"2025-11-15","cited_by_count":6,"area":null},{"id":"2507.06173","title":"A Method for Optimizing Connections in Differentiable Logic Gate Networks","created":"2025-07-08","cited_by_count":5,"area":null},{"id":"2505.19932","title":"Logic Gate Neural Networks are Good for Verification","created":"2025-05-26","cited_by_count":4,"area":null},{"id":"2507.02585","title":"Scalable Interconnect Learning in Boolean Networks","created":"2025-07-03","cited_by_count":4,"area":null},{"id":"2511.00812","title":"LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neurons","created":"2025-11-02","cited_by_count":3,"area":null},{"id":"2606.31845","title":"Explicit Fuzzy Logic in the Feed-Forward Layer: Self-Forgetting Quantifiers Discover Legible Grammatical-Licensing Detectors","created":"2026-06-30","cited_by_count":3,"area":null},{"id":"2505.23615","title":"Learning Interpretable Differentiable Logic Networks for Tabular Regression","created":"2025-05-29","cited_by_count":2,"area":null},{"id":"2602.03527","title":"WARP Logic Neural Networks","created":"2026-02-03","cited_by_count":2,"area":null},{"id":"2603.00302","title":"Polynomial Surrogate Training for Differentiable Ternary Logic Gate Networks","created":"2026-02-27","cited_by_count":2,"area":null},{"id":"2509.25933","title":"From MNIST to ImageNet: Understanding the Scalability Boundaries of Differentiable Logic Gate Networks","created":"2025-09-30","cited_by_count":1,"area":null},{"id":"2512.01467","title":"Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Control","created":"2025-12-01","cited_by_count":1,"area":null},{"id":"2601.11433","title":"Inter-patient ECG Arrhythmia Classification with LGNs and LUTNs","created":"2026-01-16","cited_by_count":1,"area":null},{"id":"2601.13953","title":"Differentiable Logic Synthesis: Spectral Coefficient Selection via Sinkhorn-Constrained Composition","created":"2026-01-20","cited_by_count":1,"area":null},{"id":"2602.05830","title":"Learning Compact Boolean Networks","created":"2026-02-05","cited_by_count":1,"area":null},{"id":"2602.07400","title":"BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks","created":"2026-02-07","cited_by_count":1,"area":null},{"id":"2606.26609","title":"LogicIR: Logic Gate Networks for Image Restoration","created":"2026-06-25","cited_by_count":1,"area":null},{"id":"2607.08427","title":"FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTs","created":"2026-07-09","cited_by_count":1,"area":null},{"id":"2507.18521","title":"GLANCE: Graph Logic Attention Network with Cluster Enhancement for Heterophilous Graph Representation Learning","created":"2025-07-24","cited_by_count":0,"area":null},{"id":"2508.17512","title":"Learning Interpretable Differentiable Logic Networks for Time-Series Classification","created":"2025-08-24","cited_by_count":0,"area":null},{"id":"2511.00768","title":"A Framework Based on Graph Cellular Automata for Similarity Evaluation in Urban Spatial Networks","created":"2025-11-02","cited_by_count":0,"area":null},{"id":"2512.06113","title":"Hardware Software Optimizations for Fast Model Recovery on Reconfigurable Architectures","created":"2025-12-05","cited_by_count":0,"area":null},{"id":"2602.12851","title":"Chimera: Neuro-Symbolic Attention Primitives for Trustworthy Dataplane Intelligence","created":"2026-02-13","cited_by_count":0,"area":null},{"id":"2603.07606","title":"TT-Sparse: Learning Sparse Rule Models with Differentiable Truth Tables","created":"2026-03-08","cited_by_count":0,"area":null},{"id":"2603.22770","title":"From Arithmetic to Logic: The Resilience of Logic and Lookup-Based Neural Networks Under Parameter Bit-Flips","created":"2026-03-24","cited_by_count":0,"area":null},{"id":"2604.19334","title":"Silicon Aware Neural Networks","created":"2026-04-21","cited_by_count":0,"area":null},{"id":"2604.21694","title":"Efficient Logic Gate Networks for Video Copy Detection","created":"2026-04-23","cited_by_count":0,"area":null},{"id":"2605.08657","title":"Fitting Multilinear Polynomials for Logic Gate Networks","created":"2026-05-09","cited_by_count":0,"area":null},{"id":"2605.24649","title":"On the Stability and Realizability of Recurrent Polynomial Surrogate Ternary Logic Gate Networks","created":"2026-05-23","cited_by_count":0,"area":null},{"id":"2607.18149","title":"Differentiable Logic Gate Networks for Low-Latency EEG Classification on Edge Devices","created":"2026-07-20","cited_by_count":0,"area":null},{"id":"2609.33747","title":"Task-Aware Discretization of Differentiable Logic Gate Networks","created":"2026-09-27","cited_by_count":0,"area":null},{"id":"2610.01069","title":"Overcoming Kernel Redundancy for Scaling Logic Gate Networks","created":"2026-10-01","cited_by_count":0,"area":null}],"next_cursor":null}