{"total":64,"rows":[{"id":"2404.14294","title":"A Survey on Efficient Inference for Large Language Models","created":"2024-04-22","cited_by_count":205,"area":"inference"},{"id":"2402.16363","title":"LLM Inference Unveiled: Survey and Roofline Model Insights","created":"2024-02-26","cited_by_count":152,"area":"inference"},{"id":"2403.11421","title":"FastDecode: High-Throughput GPU-Efficient LLM Serving using Heterogeneous Pipelines","created":"2024-03-18","cited_by_count":49,"area":"inference"},{"id":"2410.04466","title":"Large Language Model Inference Acceleration: A Comprehensive Hardware Perspective","created":"2024-10-06","cited_by_count":38,"area":"inference"},{"id":"2410.20011","title":"A Survey of Small Language Models","created":"2024-10-25","cited_by_count":31,"area":null},{"id":"2406.07081","title":"Efficiently Exploring Large Language Models for Document-Level Machine Translation with In-context Learning","created":"2024-06-11","cited_by_count":23,"area":null},{"id":"2505.16120","title":"LLM-Powered AI Agent Systems and Their Applications in Industry","created":"2025-05-22","cited_by_count":22,"area":"agents"},{"id":"2410.13461","title":"Progressive Mixed-Precision Decoding for Efficient LLM Inference","created":"2024-10-17","cited_by_count":18,"area":"inference"},{"id":"2502.03304","title":"Harmony in Divergence: Towards Fast, Accurate, and Memory-efficient Zeroth-order LLM Fine-tuning","created":"2025-02-05","cited_by_count":18,"area":null},{"id":"2410.04960","title":"On Efficient Variants of Segment Anything Model: A Survey","created":"2024-10-07","cited_by_count":16,"area":null},{"id":"2406.08413","title":"Memory Is All You Need: An Overview of Compute-in-Memory Architectures for Accelerating Large Language Model Inference","created":"2024-06-12","cited_by_count":15,"area":null},{"id":"2503.18599","title":"Oaken: Fast and Efficient LLM Serving with Online-Offline Hybrid KV Cache Quantization","created":"2025-03-24","cited_by_count":14,"area":"inference"},{"id":"2502.15260","title":"LightMamba: Efficient Mamba Acceleration on FPGA with Quantization and Hardware Co-design","created":"2025-02-21","cited_by_count":11,"area":"ssm"},{"id":"2504.20314","title":"Perturbation-efficient Zeroth-order Optimization for Hardware-friendly On-device Training","created":"2025-04-28","cited_by_count":9,"area":null},{"id":"2509.16989","title":"PTQTP: Post-Training Quantization to Trit-Planes for Large Language Models","created":"2025-09-21","cited_by_count":9,"area":null},{"id":"2603.16952","title":"Embodied Foundation Models at the Edge: A Survey of Deployment Constraints and Mitigation Strategies","created":"2026-03-16","cited_by_count":9,"area":null},{"id":"2406.10903","title":"New Solutions on LLM Acceleration, Optimization, and Application","created":"2024-06-16","cited_by_count":7,"area":null},{"id":"2502.10659","title":"Pushing up to the Limit of Memory Bandwidth and Capacity Utilization for Efficient LLM Decoding on Embedded FPGA","created":"2025-02-15","cited_by_count":7,"area":"inference"},{"id":"2502.16473","title":"TerEffic: Highly Efficient Ternary LLM Inference on FPGA","created":"2025-02-23","cited_by_count":6,"area":null},{"id":"2509.13765","title":"TENET: An Efficient Sparsity-Aware LUT-Centric Architecture for Ternary LLM Inference On Edge","created":"2025-09-17","cited_by_count":6,"area":null},{"id":"2509.18763","title":"Bi-VLM: Pushing Ultra-Low Precision Post-Training Quantization Boundaries in Vision-Language Models","created":"2025-09-23","cited_by_count":5,"area":"mllm"},{"id":"2509.19873","title":"SpecMamba: Accelerating Mamba Inference on FPGA with Speculative Decoding","created":"2025-09-24","cited_by_count":5,"area":"inference"},{"id":"2603.08721","title":"KernelCraft: Benchmarking for Agentic Close-to-Metal Kernel Generation on Emerging Hardware","created":"2026-02-10","cited_by_count":5,"area":"agents"},{"id":"2412.13437","title":"Deploying Foundation Model Powered Agent Services: A Survey","created":"2024-12-18","cited_by_count":4,"area":"agents"},{"id":"2503.11663","title":"MEADOW: Memory-efficient Dataflow and Data Packing for Low Power Edge LLMs","created":"2025-02-14","cited_by_count":4,"area":null},{"id":"2511.06174","title":"LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs","created":"2025-11-09","cited_by_count":4,"area":"inference"},{"id":"2411.03697","title":"TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture","created":"2024-11-06","cited_by_count":3,"area":null},{"id":"2411.18148","title":"A Runtime-Adaptive Transformer Neural Network Accelerator on FPGAs","created":"2024-11-27","cited_by_count":3,"area":null},{"id":"2502.08807","title":"InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs","created":"2025-02-12","cited_by_count":3,"area":null},{"id":"2509.00031","title":"End-to-End On-Device Quantization-Aware Training for LLMs at Inference Cost","created":"2025-08-21","cited_by_count":3,"area":null},{"id":"2601.15710","title":"FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design","created":"2026-01-22","cited_by_count":3,"area":null},{"id":"2602.24059","title":"Quant Experts: Token-aware Adaptive Error Reconstruction with Mixture of Experts for Large Vision-Language Models Quantization","created":"2026-02-27","cited_by_count":3,"area":"mllm"},{"id":"2603.05931","title":"A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA","created":"2026-03-06","cited_by_count":3,"area":"inference"},{"id":"2603.21725","title":"CurvZO: Adaptive Curvature-Guided Sparse Zeroth-Order Optimization for Efficient LLM Fine-Tuning","created":"2026-03-23","cited_by_count":3,"area":null},{"id":"2410.06722","title":"Scaling Laws For Mixed Quantization","created":"2024-10-09","cited_by_count":2,"area":null},{"id":"2410.19096","title":"Watermarking Large Language Models and the Generated Content: Opportunities and Challenges","created":"2024-10-24","cited_by_count":2,"area":"safety"},{"id":"2411.11852","title":"LUTMUL: Exceed Conventional FPGA Roofline Limit by LUT-based Efficient Multiplication for Neural Network Inference","created":"2024-11-01","cited_by_count":2,"area":null},{"id":"2505.17787","title":"Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM Acceleration","created":"2025-05-23","cited_by_count":2,"area":"inference"},{"id":"2510.15926","title":"TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs","created":"2025-10-03","cited_by_count":2,"area":null},{"id":"2510.18228","title":"Towards Fast LLM Fine-tuning through Zeroth-Order Optimization with Projected Gradient-Aligned Perturbations","created":"2025-10-21","cited_by_count":2,"area":null},{"id":"2602.04163","title":"BPDQ: Bit-Plane Decomposition Quantization on a Variable Grid for Large Language Models","created":"2026-02-04","cited_by_count":2,"area":null},{"id":"2406.06211","title":"iMotion-LLM: Instruction-Conditioned Trajectory Generation","created":"2024-06-10","cited_by_count":1,"area":null},{"id":"2409.13975","title":"ProTEA: Programmable Transformer Encoder Acceleration on FPGA","created":"2024-09-21","cited_by_count":1,"area":null},{"id":"2409.14023","title":"FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs","created":"2024-09-21","cited_by_count":1,"area":null},{"id":"2504.19323","title":"NSFlow: An End-to-End FPGA Framework with Scalable Dataflow Architecture for Neuro-Symbolic AI","created":"2025-04-27","cited_by_count":1,"area":null},{"id":"2505.03745","title":"AccLLM: Accelerating Long-Context LLM Inference Via Algorithm-Hardware Co-Design","created":"2025-04-07","cited_by_count":1,"area":null},{"id":"2505.16335","title":"FPQVAR: Floating Point Quantization for Visual Autoregressive Model with FPGA Hardware Co-design","created":"2025-05-22","cited_by_count":1,"area":null},{"id":"2601.14260","title":"End-to-End Transformer Acceleration Through Processing-in-Memory Architectures","created":"2025-11-21","cited_by_count":1,"area":"inference"},{"id":"2605.13536","title":"HLS-Seek: QoR-Aware Code Generation for High-Level Synthesis via Proxy Comparative Reward Reinforcement Learning","created":"2026-05-13","cited_by_count":1,"area":"alignment"},{"id":"2605.27435","title":"When NPUs Are Not Always Faster: A Stage-Level Analysis of Mobile LLM Inference","created":"2026-05-22","cited_by_count":1,"area":null},{"id":"2404.16158","title":"The Feasibility of Implementing Large-Scale Transformers on Multi-FPGA Platforms","created":"2024-04-24","cited_by_count":0,"area":null},{"id":"2502.15773","title":"JExplore: Design Space Exploration Tool for Nvidia Jetson Boards","created":"2025-02-16","cited_by_count":0,"area":null},{"id":"2503.16731","title":"Design and Implementation of an FPGA-Based Hardware Accelerator for Transformer","created":"2025-03-20","cited_by_count":0,"area":null},{"id":"2504.09561","title":"LoopLynx: A Scalable Dataflow Architecture for Efficient LLM Inference","created":"2025-04-13","cited_by_count":0,"area":"inference"},{"id":"2505.23454","title":"LCB-CV-UNet: Enhanced Detector for High Dynamic Range Radar Signals","created":"2025-05-29","cited_by_count":0,"area":null},{"id":"2601.10953","title":"SwiftKV: An Edge-Oriented Attention Algorithm and Multi-Head Accelerator for Fast, Efficient LLM Decoding","created":"2026-01-16","cited_by_count":0,"area":"inference"},{"id":"2603.29002","title":"Understand and Accelerate Memory Processing Pipeline for Large Language Model Inference","created":"2026-03-30","cited_by_count":0,"area":"rag"},{"id":"2605.06052","title":"XtraMAC: An Efficient MAC Architecture for Mixed-Precision LLM Inference on FPGA","created":"2026-05-07","cited_by_count":0,"area":null},{"id":"2607.03652","title":"ELiTeFormer: An Efficient Transformer for FPGAs","created":"2026-07-04","cited_by_count":0,"area":null},{"id":"2607.22389","title":"HiKV: Hierarchical Importance-Aware KV Cache with Hardware Acceleration for LLM Decoding","created":"2026-07-24","cited_by_count":0,"area":"inference"},{"id":"2608.25321","title":"LLMscope: Extracting LLM Assets from Edge AI Chips via Optical Probing","created":"2026-08-26","cited_by_count":0,"area":null},{"id":"2609.01212","title":"Recent Developments in Transformer Inference Deployment on FPGA Platforms: A Survey","created":"2026-09-01","cited_by_count":0,"area":null},{"id":"2609.09772","title":"SymbolicLight V2: Hybrid Neuromorphic Architecture and Sparse Execution for Low-Energy Language Inference","created":"2026-09-09","cited_by_count":0,"area":null},{"id":"2609.19207","title":"MeshKV: A Network-on-Chip KV Cache Fabric for Scalable Transformer Decoding Accelerators","created":"2026-09-16","cited_by_count":0,"area":"inference"}],"next_cursor":null}