{"total":23,"rows":[{"id":"2410.07265","title":"A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models","created":"2024-10-08","cited_by_count":23,"area":null},{"id":"2401.09890","title":"A Survey on Hardware Accelerators for Large Language Models","created":"2024-01-18","cited_by_count":16,"area":null},{"id":"2406.08413","title":"Memory Is All You Need: An Overview of Compute-in-Memory Architectures for Accelerating Large Language Model Inference","created":"2024-06-12","cited_by_count":15,"area":null},{"id":"2405.01814","title":"Efficient Heterogeneous Large Language Model Decoding with Model-Attention Disaggregation","created":"2024-05-03","cited_by_count":12,"area":null},{"id":"2409.19315","title":"Analog In-Memory Computing Attention Mechanism for Fast and Energy-Efficient Large Language Models","created":"2024-09-28","cited_by_count":11,"area":null},{"id":"2505.14314","title":"Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators","created":"2025-05-20","cited_by_count":5,"area":null},{"id":"2402.02586","title":"ClipFormer: Key-Value Clipping of Transformers on Memristive Crossbars for Write Noise Mitigation","created":"2024-02-04","cited_by_count":4,"area":null},{"id":"2409.03384","title":"Hardware Acceleration of LLMs: A comprehensive survey and comparison","created":"2024-09-05","cited_by_count":3,"area":null},{"id":"2408.12742","title":"TReX- Reusing Vision Transformer's Attention for Efficient Xbar-based Computing","created":"2024-08-22","cited_by_count":2,"area":null},{"id":"2501.09588","title":"Atleus: Accelerating Transformers on the Edge Enabled by 3D Heterogeneous Manycore Architectures","created":"2025-01-16","cited_by_count":2,"area":null},{"id":"2502.19747","title":"HaLoRA: Hardware-aware Low-Rank Adaptation for Large Language Models Based on Hybrid Compute-in-Memory Architecture","created":"2025-02-27","cited_by_count":2,"area":null},{"id":"2505.14201","title":"FLASH-D: FlashAttention with Hidden Softmax Division","created":"2025-05-20","cited_by_count":2,"area":null},{"id":"2408.03397","title":"HeTraX: Energy Efficient 3D Heterogeneous Manycore Architecture for Transformer Acceleration","created":"2024-08-06","cited_by_count":1,"area":null},{"id":"2504.01994","title":"PIM-LLM: A High-Throughput Hybrid PIM Architecture for 1-bit LLMs","created":"2025-03-31","cited_by_count":1,"area":null},{"id":"2506.18495","title":"AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computing","created":"2025-06-23","cited_by_count":1,"area":null},{"id":"2408.05857","title":"Comparative Evaluation of Memory Technologies for Synaptic Crossbar Arrays- Part 2: Design Knobs and DNN Accuracy Trends","created":"2024-08-11","cited_by_count":0,"area":null},{"id":"2409.14838","title":"MICSim: A Modular Simulator for Mixed-signal Compute-in-Memory based AI Accelerator","created":"2024-09-23","cited_by_count":0,"area":null},{"id":"2411.14733","title":"FLARE: FP-Less PTQ and Low-ENOB ADC Based AMS-PiM for Error-Resilient, Fast, and Efficient Transformer Acceleration","created":"2024-11-22","cited_by_count":0,"area":null},{"id":"2505.21535","title":"FAR: Function-preserving Attention Replacement for IMC-friendly Inference","created":"2025-05-24","cited_by_count":0,"area":null},{"id":"2510.02675","title":"HALO: Memory-Centric Heterogeneous Accelerator with 2.5D Integration for Low-Batch LLM Inference","created":"2025-10-03","cited_by_count":0,"area":null},{"id":"2510.06834","title":"Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processors","created":"2025-10-08","cited_by_count":0,"area":null},{"id":"2604.11512","title":"EdgeCIM: A Hardware-Software Co-Design for CIM-Based Acceleration of Small Language Models","created":"2026-04-13","cited_by_count":0,"area":null},{"id":"2607.21731","title":"RED-PIM: Reducing Data Movement for Transformers using Processing-in-Memory","created":"2026-07-23","cited_by_count":0,"area":null}],"next_cursor":null}