{"total":39,"rows":[{"id":"2406.03372","title":"Training of Physical Neural Networks","created":"2024-06-05","cited_by_count":49,"area":null},{"id":"2406.08413","title":"Memory Is All You Need: An Overview of Compute-in-Memory Architectures for Accelerating Large Language Model Inference","created":"2024-06-12","cited_by_count":15,"area":null},{"id":"2303.04721","title":"Fast offset corrected in-memory training","created":"2023-03-08","cited_by_count":11,"area":null},{"id":"2307.09357","title":"Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference","created":"2023-07-18","cited_by_count":11,"area":null},{"id":"2305.10459","title":"AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing","created":"2023-05-17","cited_by_count":10,"area":null},{"id":"2406.12774","title":"Towards Exact Gradient-based Training on Analog In-memory Computing","created":"2024-06-18","cited_by_count":7,"area":null},{"id":"2305.18416","title":"Examining the Role and Limits of Batchnorm Optimization to Mitigate Diverse Hardware-noise in In-memory Computing","created":"2023-05-28","cited_by_count":5,"area":null},{"id":"2502.06309","title":"Analog In-memory Training on General Non-ideal Resistive Elements: The Impact of Response Functions","created":"2025-02-10","cited_by_count":5,"area":null},{"id":"2402.02586","title":"ClipFormer: Key-Value Clipping of Transformers on Memristive Crossbars for Write Noise Mitigation","created":"2024-02-04","cited_by_count":4,"area":null},{"id":"2409.03306","title":"Towards training digitally-tied analog blocks via hybrid gradient computation","created":"2024-09-05","cited_by_count":4,"area":null},{"id":"2312.06446","title":"Measurement-driven neural-network training for integrated magnetic tunnel junction arrays","created":"2023-12-11","cited_by_count":3,"area":null},{"id":"2404.08079","title":"DIMAT: Decentralized Iterative Merging-And-Training for Deep Learning Models","created":"2024-04-11","cited_by_count":3,"area":null},{"id":"2505.09663","title":"Analog Foundation Models","created":"2025-05-14","cited_by_count":3,"area":null},{"id":"2408.12742","title":"TReX- Reusing Vision Transformer's Attention for Efficient Xbar-based Computing","created":"2024-08-22","cited_by_count":2,"area":null},{"id":"2411.17367","title":"Efficient transformer adaptation for analog in-memory computing via low-rank adapters","created":"2024-11-26","cited_by_count":2,"area":null},{"id":"2408.12767","title":"When In-memory Computing Meets Spiking Neural Networks -- A Perspective on Device-Circuit-System-and-Algorithm Co-design","created":"2024-08-22","cited_by_count":1,"area":null},{"id":"2412.09010","title":"Harnessing Nonidealities in Analog In-Memory Computing Circuits: A Physical Modeling Approach for Neuromorphic Systems","created":"2024-12-12","cited_by_count":1,"area":null},{"id":"2505.08793","title":"Onboard Optimization and Learning: A Survey","created":"2025-05-07","cited_by_count":1,"area":null},{"id":"2506.00004","title":"Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing","created":"2025-05-05","cited_by_count":1,"area":null},{"id":"2506.18495","title":"AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computing","created":"2025-06-23","cited_by_count":1,"area":null},{"id":"2509.04506","title":"Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENs","created":"2025-09-02","cited_by_count":1,"area":null},{"id":"2609.36584","title":"Making Analog Training Scale: Co-Designing Mapping, Optimizer, and Converters","created":"2026-09-29","cited_by_count":1,"area":null},{"id":"2310.11014","title":"Hyperspectral In-Memory Computing with Optical Frequency Combs and Programmable Optical Memories","created":"2023-10-17","cited_by_count":0,"area":null},{"id":"2401.05357","title":"U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators","created":"2023-12-11","cited_by_count":0,"area":null},{"id":"2405.05141","title":"Learning-to-learn enables rapid learning with phase-change memory-based in-memory computing","created":"2024-04-22","cited_by_count":0,"area":null},{"id":"2408.02835","title":"Training a multilayer dynamical spintronic network with standard machine learning tools to perform time series classification","created":"2024-08-05","cited_by_count":0,"area":null},{"id":"2411.03375","title":"Kernel Approximation using Analog In-Memory Computing","created":"2024-11-05","cited_by_count":0,"area":null},{"id":"2501.15403","title":"Scaling of hardware-compatible perturbative training algorithms","created":"2025-01-26","cited_by_count":0,"area":null},{"id":"2509.02369","title":"Guidance and Control Neural Network Acceleration using Memristors","created":"2025-09-02","cited_by_count":0,"area":null},{"id":"2511.04798","title":"MDM: Manhattan Distance Mapping of DNN Weights for Parasitic-Resistance-Resilient Memristive Crossbars","created":"2025-11-06","cited_by_count":0,"area":null},{"id":"2601.00020","title":"Personalized Spiking Neural Networks with Ferroelectric Synapses for EEG Signal Processing","created":"2025-12-22","cited_by_count":0,"area":null},{"id":"2602.07320","title":"Incorruptible Neural Networks: Training Models that can Generalize to Large Internal Perturbations","created":"2026-02-07","cited_by_count":0,"area":null},{"id":"2603.03880","title":"Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators","created":"2026-03-04","cited_by_count":0,"area":null},{"id":"2606.00741","title":"Quantum Tunneling-Aware Machine Learning: Physics-Derived Noise Models for Robust Deployment","created":"2026-05-30","cited_by_count":0,"area":null},{"id":"2606.17471","title":"ReRAM-aware Model Finetuning addressing I-V Non-linearity and Retention Errors","created":"2026-06-16","cited_by_count":0,"area":null},{"id":"2608.15693","title":"Large Models for Small Devices: Recent Advances and Empirical Analysis of Edge AI Deployment","created":"2026-08-16","cited_by_count":0,"area":null},{"id":"2609.03149","title":"RACE-AIMC: Selective Inference for Heterogeneous Analog In-Memory Accelerators at the Edge","created":"2026-09-02","cited_by_count":0,"area":null},{"id":"2609.35586","title":"IMC-CLINIC: Coupled Loss-Informed Newton Iterations for Clipping in Analog In-Memory Computing","created":"2026-09-28","cited_by_count":0,"area":null},{"id":"2610.05318","title":"Robust Parameter-Efficient LLM Adaptation on Analog Hardware","created":"2026-10-04","cited_by_count":0,"area":null}],"next_cursor":null}