{"total":31,"rows":[{"id":"2404.01650","title":"Test-Time Model Adaptation with Only Forward Passes","created":"2024-04-02","cited_by_count":74,"area":null},{"id":"2305.18403","title":"LoRAPrune: Structured Pruning Meets Low-Rank Parameter-Efficient Fine-Tuning","created":"2023-05-28","cited_by_count":53,"area":null},{"id":"2402.16880","title":"BESA: Pruning Large Language Models with Blockwise Parameter-Efficient Sparsity Allocation","created":"2024-02-18","cited_by_count":45,"area":null},{"id":"2302.01107","title":"A Survey on Efficient Training of Transformers","created":"2023-02-02","cited_by_count":39,"area":null},{"id":"2307.07982","title":"A Survey of Techniques for Optimizing Transformer Inference","created":"2023-07-16","cited_by_count":35,"area":null},{"id":"2211.10526","title":"Castling-ViT: Compressing Self-Attention via Switching Towards Linear-Angular Attention at Vision Transformer Inference","created":"2022-11-18","cited_by_count":28,"area":null},{"id":"2503.02891","title":"Vision Transformers on the Edge: A Comprehensive Survey of Model Compression and Acceleration Strategies","created":"2025-02-26","cited_by_count":24,"area":null},{"id":"2211.16421","title":"RGB no more: Minimally-decoded JPEG Vision Transformers","created":"2022-11-29","cited_by_count":18,"area":null},{"id":"2503.16709","title":"QuartDepth: Post-Training Quantization for Real-Time Depth Estimation on the Edge","created":"2025-03-20","cited_by_count":8,"area":null},{"id":"2406.10903","title":"New Solutions on LLM Acceleration, Optimization, and Application","created":"2024-06-16","cited_by_count":7,"area":null},{"id":"2405.17025","title":"SWAT: Scalable and Efficient Window Attention-based Transformers Acceleration on FPGAs","created":"2024-05-27","cited_by_count":6,"area":null},{"id":"2403.20230","title":"An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT","created":"2024-03-29","cited_by_count":4,"area":null},{"id":"2405.19915","title":"P$^2$-ViT: Power-of-Two Post-Training Quantization and Acceleration for Fully Quantized Vision Transformer","created":"2024-05-30","cited_by_count":4,"area":null},{"id":"2405.03882","title":"Trio-ViT: Post-Training Quantization and Acceleration for Softmax-Free Efficient Vision Transformer","created":"2024-05-06","cited_by_count":3,"area":null},{"id":"2407.14296","title":"Foundation Models for Autonomous Robots in Unstructured Environments","created":"2024-07-19","cited_by_count":3,"area":null},{"id":"2410.09113","title":"M$^2$-ViT: Accelerating Hybrid Vision Transformers with Two-Level Mixed Quantization","created":"2024-10-10","cited_by_count":3,"area":null},{"id":"2407.12736","title":"CHOSEN: Compilation to Hardware Optimization Stack for Efficient Vision Transformer Inference","created":"2024-07-17","cited_by_count":2,"area":null},{"id":"2212.02687","title":"Vision Transformer Computation and Resilience for Dynamic Inference","created":"2022-12-06","cited_by_count":1,"area":null},{"id":"2310.00574","title":"YFlows: Systematic Dataflow Exploration and Code Generation for Efficient Neural Network Inference using SIMD Architectures on CPUs","created":"2023-10-01","cited_by_count":1,"area":null},{"id":"2312.13000","title":"Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures","created":"2023-12-20","cited_by_count":1,"area":null},{"id":"2503.21335","title":"A Low-Power Streaming Speech Enhancement Accelerator For Edge Devices","created":"2025-03-27","cited_by_count":1,"area":null},{"id":"2510.24985","title":"FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Models","created":"2025-10-28","cited_by_count":1,"area":null},{"id":"2503.00322","title":"T-REX: A 68-567 {\\mu}s/token, 0.41-3.95 {\\mu}J/token Transformer Accelerator with Reduced External Memory Access and Enhanced Hardware Utilization in 16nm FinFET","created":"2025-03-01","cited_by_count":0,"area":null},{"id":"2505.03748","title":"APSQ: Additive Partial Sum Quantization with Algorithm-Hardware Co-Design","created":"2025-04-10","cited_by_count":0,"area":null},{"id":"2506.06095","title":"Accelerating Sparse Transformer Inference on GPU","created":"2025-06-06","cited_by_count":0,"area":null},{"id":"2510.10676","title":"Bhasha-Rupantarika: Algorithm-Hardware Co-design approach for Multilingual Neural Machine Translation","created":"2025-10-12","cited_by_count":0,"area":null},{"id":"2510.26446","title":"1+1>2: A Synergistic Sparse and Low-Rank Compression Method for Large Language Models","created":"2025-10-30","cited_by_count":0,"area":null},{"id":"2606.06515","title":"DxPTA: An Architecture Design Space Exploration with Optical Dataflow-guided Strategy for HW/SW Co-Design of Photonic Transformer Accelerators","created":"2026-06-02","cited_by_count":0,"area":null},{"id":"2606.31938","title":"FlexViT: A Flexible FPGA-based Accelerator for Edge Vision Transformers","created":"2026-06-30","cited_by_count":0,"area":null},{"id":"2607.26016","title":"MDTransformer: A Hardware-Software Co-Design of Mode-Division Photonic Transformer Accelerator with Inverse-Designed Coherent Crossbar","created":"2026-07-28","cited_by_count":0,"area":null},{"id":"2608.01343","title":"DeVIT: Low-Power Vision Transformer Acceleration Using Delta Computation","created":"2026-08-02","cited_by_count":0,"area":null}],"next_cursor":null}