{"total":173,"rows":[{"id":"2304.07493","title":"OliVe: Accelerating Large Language Models via Hardware-friendly Outlier-Victim Pair Quantization","created":"2023-04-15","cited_by_count":92,"area":null},{"id":"2302.14017","title":"Full Stack Optimization of Transformer Inference: a Survey","created":"2023-02-27","cited_by_count":80,"area":null},{"id":"2208.06102","title":"Zeus: Understanding and Optimizing GPU Energy Consumption of DNN Training","created":"2022-08-12","cited_by_count":79,"area":null},{"id":"2208.14286","title":"ANT: Exploiting Adaptive Numerical Data Type for Low-bit Deep Neural Network Quantization","created":"2022-08-30","cited_by_count":51,"area":null},{"id":"2207.04606","title":"SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning","created":"2022-07-11","cited_by_count":47,"area":null},{"id":"2504.17577","title":"TileLang: A Composable Tiled Programming Model for AI Systems","created":"2025-04-24","cited_by_count":43,"area":null},{"id":"2109.08267","title":"CompilerGym: Robust, Performant Compiler Optimization Environments for AI Research","created":"2021-09-17","cited_by_count":41,"area":null},{"id":"2405.05751","title":"Mirage: A Multi-Level Superoptimizer for Tensor Programs","created":"2024-05-09","cited_by_count":41,"area":null},{"id":"2207.04296","title":"TensorIR: An Abstraction for Automatic Tensorized Program Optimization","created":"2022-07-09","cited_by_count":38,"area":null},{"id":"2507.17773","title":"MultiKernelBench: A Multi-Platform Benchmark for Kernel Generation","created":"2025-07-20","cited_by_count":38,"area":null},{"id":"2205.13603","title":"Tensor Program Optimization with Probabilistic Programs","created":"2022-05-26","cited_by_count":30,"area":null},{"id":"2207.13066","title":"NNSmith: Generating Diverse and Valid Test Cases for Deep Learning Compilers","created":"2022-07-26","cited_by_count":30,"area":null},{"id":"2210.09603","title":"Hidet: Task-Mapping Programming Paradigm for Deep Learning Tensor Programs","created":"2022-10-18","cited_by_count":28,"area":null},{"id":"2201.12465","title":"Flashlight: Enabling Innovation in Tools for Machine Learning","created":"2022-01-29","cited_by_count":25,"area":null},{"id":"2301.10936","title":"PIT: Optimization of Dynamic Sparse Deep Learning Models via Permutation Invariant Transformation","created":"2023-01-26","cited_by_count":25,"area":null},{"id":"2601.00227","title":"FlashInfer-Bench: Building the Virtuous Cycle for AI-driven LLM Systems","created":"2026-01-01","cited_by_count":25,"area":null},{"id":"2501.14794","title":"Characterizing Mobile SoC for Accelerating Heterogeneous LLM Inference","created":"2025-01-11","cited_by_count":22,"area":null},{"id":"2110.15238","title":"Bolt: Bridging the Gap between Auto-tuners and Hardware-native Performance","created":"2021-10-25","cited_by_count":18,"area":null},{"id":"2408.06003","title":"LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference","created":"2024-08-12","cited_by_count":18,"area":null},{"id":"2110.10221","title":"The CoRa Tensor Compiler: Compilation for Ragged Tensors with Minimal Padding","created":"2021-10-19","cited_by_count":17,"area":null},{"id":"2105.14713","title":"1xN Pattern for Pruning Convolutional Neural Networks","created":"2021-05-31","cited_by_count":16,"area":null},{"id":"2205.01271","title":"Lite Pose: Efficient Architecture Design for 2D Human Pose Estimation","created":"2022-05-03","cited_by_count":16,"area":null},{"id":"2308.13490","title":"TpuGraphs: A Performance Prediction Dataset on Large Tensor Computational Graphs","created":"2023-08-25","cited_by_count":16,"area":null},{"id":"2404.04815","title":"Allo: A Programming Model for Composable Accelerator Design","created":"2024-04-07","cited_by_count":16,"area":null},{"id":"2512.22219","title":"MPK: A Compiler and Runtime for Mega-Kernelizing Tensor Programs","created":"2025-12-22","cited_by_count":15,"area":null},{"id":"2211.03578","title":"TLP: A Deep Learning-based Cost Model for Tensor Program Tuning","created":"2022-11-07","cited_by_count":14,"area":null},{"id":"2505.18574","title":"Autocomp: A Powerful and Portable Code Optimizer for Tensor Accelerators","created":"2025-05-24","cited_by_count":13,"area":null},{"id":"2603.12440","title":"KernelFoundry: Hardware-aware evolutionary GPU kernel optimization","created":"2026-03-12","cited_by_count":13,"area":null},{"id":"2202.06512","title":"Benchmarking of DL Libraries and Models on Mobile Devices","created":"2022-02-14","cited_by_count":12,"area":null},{"id":"2311.02103","title":"Relax: Composable Abstractions for End-to-End Dynamic Machine Learning","created":"2023-11-01","cited_by_count":12,"area":null},{"id":"2601.07160","title":"AscendKernelGen: A Systematic Study of LLM-Based Kernel Generation for Neural Processing Units","created":"2026-01-12","cited_by_count":12,"area":null},{"id":"2302.08005","title":"Slapo: A Schedule Language for Progressive Optimization of Large Deep Learning Model Training","created":"2023-02-16","cited_by_count":11,"area":null},{"id":"2410.15625","title":"Improving Parallel Program Performance with LLM Optimizers via Agent-System Interfaces","created":"2024-10-21","cited_by_count":11,"area":null},{"id":"2508.20258","title":"SwizzlePerf: Hardware-Aware LLMs for GPU Kernel Performance Optimization","created":"2025-08-27","cited_by_count":11,"area":null},{"id":"2102.04199","title":"MetaTune: Meta-Learning Based Cost Model for Fast and Efficient Auto-tuning Frameworks","created":"2021-02-08","cited_by_count":9,"area":null},{"id":"2104.05755","title":"Tensor Processing Primitives: A Programming Abstraction for Efficiency and Portability in Deep Learning & HPC Workloads","created":"2021-04-12","cited_by_count":9,"area":null},{"id":"2301.13062","title":"Operator Fusion in XLA: Analysis and Evaluation","created":"2023-01-30","cited_by_count":9,"area":null},{"id":"2307.04963","title":"DyCL: Dynamic Neural Network Compilation Via Program Rewriting and Graph Optimization","created":"2023-07-11","cited_by_count":9,"area":null},{"id":"2102.06599","title":"Neural Architecture Search as Program Transformation Exploration","created":"2021-02-12","cited_by_count":8,"area":null},{"id":"2408.03408","title":"LLM-Aided Compilation for Tensor Accelerators","created":"2024-08-06","cited_by_count":8,"area":null},{"id":"2210.01075","title":"Decompiling x86 Deep Neural Network Executables","created":"2022-10-03","cited_by_count":7,"area":null},{"id":"2301.01333","title":"oneDNN Graph Compiler: A Hybrid Approach for High-Performance Deep Learning Compilation","created":"2023-01-03","cited_by_count":7,"area":null},{"id":"2403.11522","title":"LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers","created":"2024-03-18","cited_by_count":7,"area":null},{"id":"2406.09465","title":"Optimal Kernel Orchestration for Tensor Programs with Korch","created":"2024-06-13","cited_by_count":7,"area":null},{"id":"2509.11173","title":"Your Compiler is Backdooring Your Model: Understanding and Exploiting Compilation Inconsistency Vulnerabilities in Deep Learning Compilers","created":"2025-09-14","cited_by_count":7,"area":null},{"id":"2505.11480","title":"SuperCoder: Assembly Program Superoptimization with Large Language Models","created":"2025-05-16","cited_by_count":6,"area":null},{"id":"2510.14719","title":"Tawa: Automatic Warp Specialization for Modern GPUs with Asynchronous References","created":"2025-10-16","cited_by_count":6,"area":null},{"id":"2111.14247","title":"A Survey of Large-Scale Deep Learning Serving System Optimization: Challenges and Opportunities","created":"2021-11-28","cited_by_count":5,"area":null},{"id":"2201.05587","title":"Transfer-Tuning: Reusing Auto-Schedules for Efficient Tensor Program Code Generation","created":"2022-01-14","cited_by_count":5,"area":null},{"id":"2304.12576","title":"Harnessing Deep Learning and HPC Kernels via High-Level Loop and Tensor Abstractions on CPU Architectures","created":"2023-04-25","cited_by_count":5,"area":null},{"id":"2307.04339","title":"Miriam: Exploiting Elastic Kernels for Real-time Multi-DNN Inference on Edge GPU","created":"2023-07-10","cited_by_count":5,"area":null},{"id":"2408.04808","title":"Scaling Deep Learning Computation over the Inter-Core Connected Intelligence Processor with T10","created":"2024-08-09","cited_by_count":5,"area":null},{"id":"2410.07192","title":"PipeFill: Using GPUs During Bubbles in Pipeline-parallel LLM Training","created":"2024-09-23","cited_by_count":5,"area":null},{"id":"2410.08855","title":"MATCH: Model-Aware TVM-based Compilation for Heterogeneous Edge Devices","created":"2024-10-11","cited_by_count":5,"area":null},{"id":"2505.06302","title":"QiMeng-TensorOp: Automatically Generating High-Performance Tensor Operators with Hardware Primitives","created":"2025-05-08","cited_by_count":5,"area":null},{"id":"2608.12629","title":"CAKE: Compiler-Agent Co-Design for Frontier Kernel Evolution","created":"2026-08-12","cited_by_count":5,"area":null},{"id":"2211.07157","title":"ParCNetV2: Oversized Kernel with Enhanced Attention","created":"2022-11-14","cited_by_count":4,"area":null},{"id":"2308.00890","title":"Tango: rethinking quantization for graph neural network training on GPUs","created":"2023-08-02","cited_by_count":4,"area":null},{"id":"2309.08978","title":"Empowering In-Browser Deep Learning Inference on Edge Devices with Just-in-Time Kernel Optimizations","created":"2023-09-16","cited_by_count":4,"area":null},{"id":"2502.15349","title":"AttentionEngine: A Versatile Framework for Efficient Attention Mechanisms on Diverse Hardware Platforms","created":"2025-02-21","cited_by_count":4,"area":null},{"id":"2506.12355","title":"QiMeng-Attention: SOTA Attention Operator is generated by SOTA Attention Algorithm","created":"2025-06-14","cited_by_count":4,"area":null},{"id":"2510.08726","title":"Neptune: Advanced ML Operator Fusion for Locality and Parallelism on GPUs","created":"2025-10-09","cited_by_count":4,"area":null},{"id":"2603.07169","title":"Making LLMs Optimize Multi-Scenario CUDA Kernels Like Experts","created":"2026-03-07","cited_by_count":4,"area":null},{"id":"2604.13327","title":"Event Tensor: A Unified Abstraction for Compiling Dynamic Megakernel","created":"2026-04-14","cited_by_count":4,"area":null},{"id":"2110.10802","title":"A Data-Centric Optimization Framework for Machine Learning","created":"2021-10-20","cited_by_count":3,"area":null},{"id":"2201.05752","title":"Moses: Efficient Exploitation of Cross-device Transferable Features for Tensor Program Optimization","created":"2022-01-15","cited_by_count":3,"area":null},{"id":"2205.15568","title":"HW-Aware Initialization of DNN Auto-Tuning to Improve Exploration Time and Robustness","created":"2022-05-31","cited_by_count":3,"area":null},{"id":"2211.00471","title":"Exploring Effects of Computational Parameter Changes to Image Recognition Systems","created":"2022-11-01","cited_by_count":3,"area":null},{"id":"2212.03034","title":"Integration of a systolic array based hardware accelerator into a DNN operator auto-tuning framework","created":"2022-12-06","cited_by_count":3,"area":null},{"id":"2303.04739","title":"Advancing Direct Convolution using Convolution Slicing Optimization and ISA Extensions","created":"2023-03-08","cited_by_count":3,"area":null},{"id":"2306.06208","title":"DeltaNN: Assessing the Impact of Computational Environment Parameters on the Performance of Image Recognition Models","created":"2023-06-05","cited_by_count":3,"area":null},{"id":"2311.09690","title":"CDMPP: A Device-Model Agnostic Framework for Latency Prediction of Tensor Programs","created":"2023-11-16","cited_by_count":3,"area":null},{"id":"2405.08965","title":"MTP: A Meaning-Typed Language Abstraction for AI-Integrated Programming","created":"2024-05-14","cited_by_count":3,"area":null},{"id":"2503.19779","title":"PyGraph: Robust Compiler Support for CUDA Graphs in PyTorch","created":"2025-03-25","cited_by_count":3,"area":null},{"id":"2504.12984","title":"Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computation","created":"2025-04-17","cited_by_count":3,"area":null},{"id":"2505.11483","title":"msf-CNN: Patch-based Multi-Stage Fusion with Convolutional Neural Networks for TinyML","created":"2025-05-16","cited_by_count":3,"area":null},{"id":"2506.15961","title":"TrainVerify: Equivalence-Based Verification for Distributed LLM Training","created":"2025-06-19","cited_by_count":3,"area":null},{"id":"2510.00206","title":"LoRAFusion: Efficient LoRA Fine-Tuning for LLMs","created":"2025-09-30","cited_by_count":3,"area":null},{"id":"2512.22147","title":"GPU Kernel Optimization Beyond Full Builds: An LLM Framework with Minimal Executable Programs","created":"2025-12-15","cited_by_count":3,"area":null},{"id":"2601.12698","title":"A Two-Stage GPU Kernel Tuner Combining Semantic Refactoring and Search-Based Optimization","created":"2026-01-19","cited_by_count":3,"area":null},{"id":"2602.12305","title":"OptiML: An End-to-End Framework for Program Synthesis and CUDA Kernel Optimization","created":"2026-02-12","cited_by_count":3,"area":null},{"id":"2603.23566","title":"AscendOptimizer: Episodic Agent for Ascend NPU Operator Optimization","created":"2026-03-24","cited_by_count":3,"area":null},{"id":"2606.27153","title":"DMuon: Efficient Distributed Muon Training with Near-Adam Overhead","created":"2026-06-25","cited_by_count":3,"area":null},{"id":"2111.00655","title":"Collage: Seamless Integration of Deep Learning Backends with Automatic Placement","created":"2021-11-01","cited_by_count":2,"area":null},{"id":"2112.14679","title":"Profile Guided Optimization without Profiles: A Machine Learning Approach","created":"2021-12-24","cited_by_count":2,"area":null},{"id":"2207.01260","title":"CPrune: Compiler-Informed Model Pruning for Efficient Target-Aware DNN Execution","created":"2022-07-04","cited_by_count":2,"area":null},{"id":"2211.11172","title":"HARL: Hierarchical Adaptive Reinforcement Learning Based Auto Scheduler for Neural Networks","created":"2022-11-21","cited_by_count":2,"area":null},{"id":"2309.07235","title":"Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimization","created":"2023-09-13","cited_by_count":2,"area":null},{"id":"2402.02361","title":"Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuning","created":"2024-02-04","cited_by_count":2,"area":null},{"id":"2412.20796","title":"FastCHGNet: Training one Universal Interatomic Potential to 1.5 Hours with 32 GPUs","created":"2024-12-30","cited_by_count":2,"area":null},{"id":"2504.16214","title":"Hexcute: A Compiler Framework for Automating Layout Synthesis in GPU Programs","created":"2025-04-22","cited_by_count":2,"area":null},{"id":"2506.10401","title":"HPCTransCompile: An AI Compiler Generated Dataset for High-Performance CUDA Transpilation and LLM Preliminary Exploration","created":"2025-06-12","cited_by_count":2,"area":null},{"id":"2605.26118","title":"Xe-Forge: Multi-Stage LLM-Powered Kernel Optimization for Intel GPU","created":"2026-04-16","cited_by_count":2,"area":null},{"id":"2605.29734","title":"HTAM: Hierarchical Transition-Attended Memory for Operator Optimization","created":"2026-05-28","cited_by_count":2,"area":null},{"id":"2101.07968","title":"DynaComm: Accelerating Distributed CNN Training between Edges and Clouds through Dynamic Communication Scheduling","created":"2021-01-20","cited_by_count":1,"area":null},{"id":"2104.04731","title":"Joint Program and Layout Transformations to enable Convolutional Operators on Specialized Hardware based on Constraint Programming","created":"2021-04-10","cited_by_count":1,"area":null},{"id":"2202.06819","title":"Learning from distinctive candidates to optimize reduced-precision convolution program on tensor cores","created":"2022-02-11","cited_by_count":1,"area":null},{"id":"2204.12418","title":"Bifrost: End-to-End Evaluation and Optimization of Reconfigurable DNN Accelerators","created":"2022-04-26","cited_by_count":1,"area":null},{"id":"2205.00618","title":"LoopStack: a Lightweight Tensor Algebra Compiler Stack","created":"2022-05-02","cited_by_count":1,"area":null},{"id":"2205.14465","title":"ByteComp: Revisiting Gradient Compression in Distributed Training","created":"2022-05-28","cited_by_count":1,"area":null}],"next_cursor":"100"}