{"total":29,"rows":[{"id":"2203.08737","title":"Hardware Approximate Techniques for Deep Neural Network Accelerators: A Survey","created":"2022-03-16","cited_by_count":39,"area":null},{"id":"2108.09187","title":"Quantization Backdoors to Deep Learning Commercial Frameworks","created":"2021-08-20","cited_by_count":29,"area":null},{"id":"2206.06047","title":"Neuromorphic Wireless Cognition: Event-Driven Semantic Communications for Remote Inference","created":"2022-06-13","cited_by_count":16,"area":null},{"id":"2107.02751","title":"Quantum Annealing Formulation for Binary Neural Networks","created":"2021-07-05","cited_by_count":15,"area":null},{"id":"2103.13813","title":"RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracy","created":"2021-03-22","cited_by_count":11,"area":null},{"id":"2203.07474","title":"Distributed On-Sensor Compute System for AR/VR Devices: A Semi-Analytical Simulation Framework for Power Estimation","created":"2022-03-14","cited_by_count":8,"area":null},{"id":"2305.08415","title":"Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing","created":"2023-05-15","cited_by_count":8,"area":null},{"id":"2205.12781","title":"Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processors","created":"2022-05-25","cited_by_count":7,"area":null},{"id":"2503.22567","title":"Benchmarking Ultra-Low-Power $\\mu$NPUs","created":"2025-03-28","cited_by_count":6,"area":null},{"id":"2411.01431","title":"Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision","created":"2024-11-03","cited_by_count":5,"area":null},{"id":"2301.03904","title":"RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration","created":"2023-01-10","cited_by_count":4,"area":null},{"id":"2105.03822","title":"RBNN: Memory-Efficient Reconfigurable Deep Binary Neural Network with IP Protection for Internet of Things","created":"2021-05-09","cited_by_count":3,"area":null},{"id":"2501.19347","title":"An All-digital 8.6-nJ/Frame 65-nm Tsetlin Machine Image Classification Accelerator","created":"2025-01-31","cited_by_count":3,"area":null},{"id":"2502.09954","title":"On Space Folds of ReLU Neural Networks","created":"2025-02-14","cited_by_count":3,"area":null},{"id":"2104.00210","title":"Training Multi-bit Quantized and Binarized Networks with A Learnable Symmetric Quantizer","created":"2021-04-01","cited_by_count":2,"area":null},{"id":"2202.07462","title":"Vau da muntanialas: Energy-efficient multi-die scalable acceleration of RNN inference","created":"2022-02-14","cited_by_count":2,"area":null},{"id":"2208.01944","title":"PalQuant: Accelerating High-precision Networks on Low-precision Accelerators","created":"2022-08-03","cited_by_count":2,"area":null},{"id":"2508.14582","title":"An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems","created":"2025-08-20","cited_by_count":2,"area":null},{"id":"2211.11331","title":"BrainTTA: A 35 fJ/op Compiler Programmable Mixed-Precision Transport-Triggered NN SoC","created":"2022-11-21","cited_by_count":1,"area":null},{"id":"2305.11928","title":"Energy-frugal and Interpretable AI Hardware Design using Learning Automata","created":"2023-05-19","cited_by_count":1,"area":null},{"id":"2408.02473","title":"Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow","created":"2024-08-05","cited_by_count":1,"area":null},{"id":"2502.07823","title":"Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs","created":"2025-02-10","cited_by_count":1,"area":null},{"id":"2503.21436","title":"Stochastic Engrams for Efficient Continual Learning","created":"2025-03-27","cited_by_count":1,"area":null},{"id":"2106.12810","title":"A Construction Kit for Efficient Low Power Neural Network Accelerator Designs","created":"2021-06-24","cited_by_count":0,"area":null},{"id":"2206.12358","title":"Low- and Mixed-Precision Inference Accelerators","created":"2022-06-24","cited_by_count":0,"area":null},{"id":"2310.07940","title":"Cost-Driven Hardware-Software Co-Optimization of Machine Learning Pipelines","created":"2023-10-11","cited_by_count":0,"area":null},{"id":"2511.19740","title":"CAMformer: Associative Memory is All You Need","created":"2025-11-24","cited_by_count":0,"area":null},{"id":"2601.19920","title":"PiC-BNN: A 128-kbit 65 nm Processing-in-CAM-Based End-to-End Binary Neural Network Accelerator","created":"2026-01-08","cited_by_count":0,"area":null},{"id":"2605.30198","title":"Active Continual Learning with Metaplastic Binary Bayesian Neural Networks","created":"2026-05-28","cited_by_count":0,"area":null}],"next_cursor":null}